| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | acle-intrinsics-rot.ll | 107 ; CHECK: uxtab16 r0, r0, r1, ror #8
113 %0 = tail call i32 @llvm.arm.uxtab16(i32 %a, i32 %or.i)
118 ; CHECK: uxtab16 r0, r0, r1, ror #16
124 %0 = tail call i32 @llvm.arm.uxtab16(i32 %a, i32 %or.i)
129 ; CHECK: uxtab16 r0, r0, r1, ror #24
135 %0 = tail call i32 @llvm.arm.uxtab16(i32 %a, i32 %or.i)
142 declare i32 @llvm.arm.uxtab16(i32, i32)
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| D | acle-intrinsics.ll | 63 ; CHECK: uxtab16 r0, r1, r0
67 %tmp2 = call i32 @llvm.arm.uxtab16(i32 %b, i32 %tmp1)
429 declare i32 @llvm.arm.uxtab16(i32, i32)
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| /external/llvm-project/llvm/test/MC/ARM/ |
| D | thumb2-dsp-diag.s | 22 uxtab16 r0, r0, r0 label
32 @ CHECK-7EM: uxtab16 r0, r0, r0 @ encoding: [0x30,0xfa,0x80,0xf0]
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| D | thumbv8m.s | 29 uxtab16 r0, r1, r2 label
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| D | basic-arm-instructions.s | 3484 uxtab16 r6, r2, r7, ror #0
3485 uxtab16 r3, r5, r8, ror #8
3486 uxtab16 r3, r2, r1, ror #16
3490 @ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x77,0x60,0xc2,0xe6]
3491 @ CHECK: uxtab16 r3, r5, r8, ror #8 @ encoding: [0x78,0x34,0xc5,0xe6]
3492 @ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x71,0x38,0xc2,0xe6]
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| D | basic-thumb2-instructions.s | 3854 uxtab16 r6, r2, r7, ror #0
3855 uxtab16 r3, r5, r8, ror #8
3856 uxtab16 r3, r2, r1, ror #16
3862 @ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x32,0xfa,0x87,0xf6]
3863 @ CHECK: uxtab16 r3, r5, r8, ror #8 @ encoding: [0x35,0xfa,0x98,0xf3]
3864 @ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x32,0xfa,0xa1,0xf3]
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| /external/llvm/test/MC/ARM/ |
| D | thumb2-dsp-diag.s | 22 uxtab16 r0, r0, r0 label
32 @ CHECK-7EM: uxtab16 r0, r0, r0 @ encoding: [0x30,0xfa,0x80,0xf0]
|
| D | thumbv8m.s | 29 uxtab16 r0, r1, r2 label
|
| D | basic-arm-instructions.s | 3454 uxtab16 r6, r2, r7, ror #0
3455 uxtab16 r3, r5, r8, ror #8
3456 uxtab16 r3, r2, r1, ror #16
3460 @ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x77,0x60,0xc2,0xe6]
3461 @ CHECK: uxtab16 r3, r5, r8, ror #8 @ encoding: [0x78,0x34,0xc5,0xe6]
3462 @ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x71,0x38,0xc2,0xe6]
|
| D | basic-thumb2-instructions.s | 3595 uxtab16 r6, r2, r7, ror #0
3596 uxtab16 r3, r5, r8, ror #8
3597 uxtab16 r3, r2, r1, ror #16
3603 @ CHECK: uxtab16 r6, r2, r7 @ encoding: [0x32,0xfa,0x87,0xf6]
3604 @ CHECK: uxtab16 r3, r5, r8, ror #8 @ encoding: [0x35,0xfa,0x98,0xf3]
3605 @ CHECK: uxtab16 r3, r2, r1, ror #16 @ encoding: [0x32,0xfa,0xa1,0xf3]
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| /external/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AExtI-arm.txt | 61 # CHECK: uxtab16
|
| D | thumb-tests.txt | 99 # CHECK: uxtab16 r1, r2, r3, ror #8
|
| D | thumb2.txt | 2596 # CHECK: uxtab16 r6, r2, r7
2597 # CHECK: uxtab16 r3, r5, r8, ror #8
2598 # CHECK: uxtab16 r3, r2, r1, ror #16
|
| D | basic-arm-instructions.txt | 2447 # CHECK: uxtab16 r6, r2, r7
2448 # CHECK: uxtab16 r3, r5, r8, ror #8
2449 # CHECK: uxtab16 r3, r2, r1, ror #16
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | unpredictable-AExtI-arm.txt | 61 # CHECK: uxtab16
|
| D | thumb-tests.txt | 102 # CHECK: uxtab16 r1, r2, r3, ror #8
|
| D | basic-arm-instructions.txt | 2447 # CHECK: uxtab16 r6, r2, r7
2448 # CHECK: uxtab16 r3, r5, r8, ror #8
2449 # CHECK: uxtab16 r3, r2, r1, ror #16
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| D | thumb2.txt | 2596 # CHECK: uxtab16 r6, r2, r7
2597 # CHECK: uxtab16 r3, r5, r8, ror #8
2598 # CHECK: uxtab16 r3, r2, r1, ror #16
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | m7-int.s | 417 uxtab16 r0, r1, r2 label
418 uxtab16 r0, r1, r2, ROR #8 label
845 # CHECK-NEXT: 1 2 1.00 uxtab16 r0, r1, r2
846 # CHECK-NEXT: 1 2 1.00 uxtab16 r0, r1, r2, ror #8
1285 …0 - - - - 1.00 1.00 - - - - - uxtab16 r0, r1, r2
1286 … - - - 1.00 1.00 - - - - - uxtab16 r0, r1, r2, ror #8
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| D | m4-int.s | 430 uxtab16 r0, r1, r2 label
431 uxtab16 r0, r1, r2, ROR #8 label
869 # CHECK-NEXT: 1 1 1.00 uxtab16 r0, r1, r2
870 # CHECK-NEXT: 1 1 1.00 uxtab16 r0, r1, r2, ror #8
1307 # CHECK-NEXT: 1.00 uxtab16 r0, r1, r2
1308 # CHECK-NEXT: 1.00 uxtab16 r0, r1, r2, ror #8
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| D | cortex-a57-basic-instructions.s | 835 uxtab16 r6, r2, r7
836 uxtab16 r3, r5, r8, ror #8
837 uxtab16 r3, r2, r1, ror #16
1705 # CHECK-NEXT: 1 4 1.00 uxtab16 r6, r2, r7
1706 # CHECK-NEXT: 1 4 1.00 uxtab16 r3, r5, r8, ror #8
1707 # CHECK-NEXT: 1 4 1.00 uxtab16 r3, r2, r1, ror #16
2582 # CHECK-NEXT: - - - - 1.00 - - - uxtab16 r6, r2, r7
2583 # CHECK-NEXT: - - - - 1.00 - - - uxtab16 r3, r5, r8, ror #8
2584 # CHECK-NEXT: - - - - 1.00 - - - uxtab16 r3, r2, r1, ror #16
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| D | cortex-a57-thumb.s | 867 uxtab16 r6, r2, r7
868 uxtab16 r3, r5, r8, ror #8
869 uxtab16 r3, r2, r1, ror #16
1774 # CHECK-NEXT: 1 4 1.00 uxtab16 r6, r2, r7
1775 # CHECK-NEXT: 1 4 1.00 uxtab16 r3, r5, r8, ror #8
1776 # CHECK-NEXT: 1 4 1.00 uxtab16 r3, r2, r1, ror #16
2688 # CHECK-NEXT: - - - - 1.00 - - - uxtab16 r6, r2, r7
2689 # CHECK-NEXT: - - - - 1.00 - - - uxtab16 r3, r5, r8, ror #8
2690 # CHECK-NEXT: - - - - 1.00 - - - uxtab16 r3, r2, r1, ror #16
|
| /external/capstone/suite/MC/ARM/ |
| D | basic-thumb2-instructions.s.cs | 1164 0x32,0xfa,0x87,0xf6 = uxtab16 r6, r2, r7
1165 0x35,0xfa,0x98,0xf3 = uxtab16 r3, r5, r8, ror #8
1166 0x32,0xfa,0xa1,0xf3 = uxtab16 r3, r2, r1, ror #16
|
| D | basic-arm-instructions.s.cs | 962 0x77,0x60,0xc2,0xe6 = uxtab16 r6, r2, r7
963 0x78,0x34,0xc5,0xe6 = uxtab16 r3, r5, r8, ror #8
964 0x71,0x38,0xc2,0xe6 = uxtab16 r3, r2, r1, ror #16
|
| /external/vixl/test/aarch32/ |
| D | test-assembler-cond-rd-rn-operand-rm-t32.cc | 76 M(uxtab16) \
|