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Searched refs:uxtb16 (Results 1 – 25 of 48) sorted by relevance

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/external/llvm-project/llvm/test/CodeGen/ARM/
Duxtb.ll6 ; CHECK-NEXT: uxtb16 r0, r0
15 ; CHECK-NEXT: uxtb16 r0, r0, ror #8
25 ; CHECK-NEXT: uxtb16 r0, r0, ror #8
35 ; CHECK-NEXT: uxtb16 r0, r0, ror #8
45 ; CHECK-NEXT: uxtb16 r0, r0, ror #8
55 ; CHECK-NEXT: uxtb16 r0, r0, ror #16
68 ; CHECK-NEXT: uxtb16 r0, r0, ror #16
81 ; CHECK-NEXT: uxtb16 r0, r0, ror #24
93 ; CHECK-NEXT: uxtb16 r0, r0, ror #24
109 ; CHECK-NEXT: uxtb16 r1, r1
Dacle-intrinsics-rot.ll41 ; CHECK: uxtb16 r0, r0, ror #8
47 %0 = tail call i32 @llvm.arm.uxtb16(i32 %or.i)
52 ; CHECK: uxtb16 r0, r0, ror #16
58 %0 = tail call i32 @llvm.arm.uxtb16(i32 %or.i)
63 ; CHECK: uxtb16 r0, r0, ror #24
69 %0 = tail call i32 @llvm.arm.uxtb16(i32 %or.i)
140 declare i32 @llvm.arm.uxtb16(i32)
Dinlineasm.ll4 %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; <i32> [#uses=1]
Dacle-intrinsics.ll64 ; CHECK: uxtb16 r0, r0
68 %tmp3 = call i32 @llvm.arm.uxtb16(i32 %tmp2)
430 declare i32 @llvm.arm.uxtb16(i32)
/external/llvm/test/CodeGen/Thumb2/
Dthumb2-uxtb.ll6 ; ARMv7A: uxtb16 r0, r0
17 ; ARMv7A: uxtb16 r0, r0, ror #8
29 ; ARMv7A: uxtb16 r0, r0, ror #8
41 ; ARMv7A: uxtb16 r0, r0, ror #8
53 ; ARMv7A: uxtb16 r0, r0, ror #8
65 ; ARMv7A: uxtb16 r0, r0, ror #16
80 ; ARMv7A: uxtb16 r0, r0, ror #16
95 ; ARMv7A: uxtb16 r0, r0, ror #24
109 ; ARMv7A: uxtb16 r0, r0, ror #24
126 ; ARMv7A: uxtb16 r1, r1
/external/llvm-project/llvm/test/MC/ARM/
Dthumb2-dsp-diag.s23 uxtb16 r0, r0 label
24 uxtb16 r0, r0, ror #8 label
33 @ CHECK-7EM: uxtb16 r0, r0 @ encoding: [0x3f,0xfa,0x80,0xf0]
34 @ CHECK-7EM: uxtb16 r0, r0, ror #8 @ encoding: [0x3f,0xfa,0x90,0xf0]
Dbasic-arm-instructions.s3530 uxtb16 r1, r4
3531 uxtb16 r6, r7, ror #0
3533 uxtb16 r3, r1, ror #16
3536 @ CHECK: uxtb16 r1, r4 @ encoding: [0x74,0x10,0xcf,0xe6]
3537 @ CHECK: uxtb16 r6, r7 @ encoding: [0x77,0x60,0xcf,0xe6]
3539 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x71,0x38,0xcf,0xe6]
Dbasic-thumb2-instructions.s3914 uxtb16 r1, r4
3915 uxtb16 r6, r7, ror #0
3918 uxtb16 r3, r1, ror #16
3922 @ CHECK: uxtb16 r1, r4 @ encoding: [0x3f,0xfa,0x84,0xf1]
3923 @ CHECK: uxtb16 r6, r7 @ encoding: [0x3f,0xfa,0x87,0xf6]
3926 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x3f,0xfa,0xa1,0xf3]
/external/llvm/test/MC/ARM/
Dthumb2-dsp-diag.s23 uxtb16 r0, r0 label
24 uxtb16 r0, r0, ror #8 label
33 @ CHECK-7EM: uxtb16 r0, r0 @ encoding: [0x3f,0xfa,0x80,0xf0]
34 @ CHECK-7EM: uxtb16 r0, r0, ror #8 @ encoding: [0x3f,0xfa,0x90,0xf0]
Dbasic-arm-instructions.s3500 uxtb16 r1, r4
3501 uxtb16 r6, r7, ror #0
3503 uxtb16 r3, r1, ror #16
3506 @ CHECK: uxtb16 r1, r4 @ encoding: [0x74,0x10,0xcf,0xe6]
3507 @ CHECK: uxtb16 r6, r7 @ encoding: [0x77,0x60,0xcf,0xe6]
3509 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x71,0x38,0xcf,0xe6]
Dbasic-thumb2-instructions.s3655 uxtb16 r1, r4
3656 uxtb16 r6, r7, ror #0
3659 uxtb16 r3, r1, ror #16
3663 @ CHECK: uxtb16 r1, r4 @ encoding: [0x3f,0xfa,0x84,0xf1]
3664 @ CHECK: uxtb16 r6, r7 @ encoding: [0x3f,0xfa,0x87,0xf6]
3667 @ CHECK: uxtb16 r3, r1, ror #16 @ encoding: [0x3f,0xfa,0xa1,0xf3]
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dthumb2-uxtb.ll11 ; CHECK-DSP-NEXT: uxtb16 r0, r0
26 ; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #8
42 ; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #8
58 ; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #8
74 ; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #8
90 ; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #16
109 ; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #16
128 ; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #24
146 ; CHECK-DSP-NEXT: uxtb16 r0, r0, ror #24
167 ; CHECK-DSP-NEXT: uxtb16 r1, r1
Dinlineasm-mve.ll4 %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 )
/external/llvm/test/CodeGen/ARM/
Dinlineasm.ll4 %tmp56 = tail call i32 asm "uxtb16 $0,$1", "=r,r"( i32 %tmp54 ) ; <i32> [#uses=1]
/external/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AExtI-arm.txt46 # CHECK: uxtb16
Dthumb-tests.txt296 # CHECK: uxtb16 r9, r12, ror #16
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dunpredictable-AExtI-arm.txt46 # CHECK: uxtb16
Dthumb-tests.txt299 # CHECK: uxtb16 r9, r12, ror #16
/external/llvm-project/llvm/test/tools/llvm-mca/ARM/
Dm7-int.s424 uxtb16 r0, r1 label
425 uxtb16 r0, r1, ROR #8 label
852 # CHECK-NEXT: 1 1 1.00 uxtb16 r0, r1
853 # CHECK-NEXT: 1 1 1.00 uxtb16 r0, r1, ror #8
1292 … 0.50 - - - - 1.00 - - - - - - uxtb16 r0, r1
1293 … - - - - 1.00 - - - - - - uxtb16 r0, r1, ror #8
Dm4-int.s437 uxtb16 r0, r1 label
438 uxtb16 r0, r1, ROR #8 label
876 # CHECK-NEXT: 1 1 1.00 uxtb16 r0, r1
877 # CHECK-NEXT: 1 1 1.00 uxtb16 r0, r1, ror #8
1314 # CHECK-NEXT: 1.00 uxtb16 r0, r1
1315 # CHECK-NEXT: 1.00 uxtb16 r0, r1, ror #8
Dcortex-a57-basic-instructions.s849 uxtb16 r1, r4
850 uxtb16 r6, r7
852 uxtb16 r3, r1, ror #16
1719 # CHECK-NEXT: 1 2 1.00 uxtb16 r1, r4
1720 # CHECK-NEXT: 1 2 1.00 uxtb16 r6, r7
1722 # CHECK-NEXT: 1 2 1.00 uxtb16 r3, r1, ror #16
2596 # CHECK-NEXT: - - - - 1.00 - - - uxtb16 r1, r4
2597 # CHECK-NEXT: - - - - 1.00 - - - uxtb16 r6, r7
2599 # CHECK-NEXT: - - - - 1.00 - - - uxtb16 r3, r1, ror #16
Dcortex-a57-thumb.s886 uxtb16 r1, r4
887 uxtb16 r6, r7
890 uxtb16 r3, r1, ror #16
1793 # CHECK-NEXT: 1 1 0.50 uxtb16 r1, r4
1794 # CHECK-NEXT: 1 1 0.50 uxtb16 r6, r7
1797 # CHECK-NEXT: 1 1 0.50 uxtb16 r3, r1, ror #16
2707 # CHECK-NEXT: - 0.50 0.50 - - - - - uxtb16 r1, r4
2708 # CHECK-NEXT: - 0.50 0.50 - - - - - uxtb16 r6, r7
2711 # CHECK-NEXT: - 0.50 0.50 - - - - - uxtb16 r3, r1, ror #16
/external/capstone/suite/MC/ARM/
Dbasic-thumb2-instructions.s.cs1184 0x3f,0xfa,0x84,0xf1 = uxtb16 r1, r4
1185 0x3f,0xfa,0x87,0xf6 = uxtb16 r6, r7
1188 0x3f,0xfa,0xa1,0xf3 = uxtb16 r3, r1, ror #16
Dbasic-arm-instructions.s.cs976 0x74,0x10,0xcf,0xe6 = uxtb16 r1, r4
977 0x77,0x60,0xcf,0xe6 = uxtb16 r6, r7
979 0x71,0x38,0xcf,0xe6 = uxtb16 r3, r1, ror #16
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-operand-rn-t32.cc64 M(uxtb16) \

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