| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86LegalizerInfo.cpp | 314 const LLT v16s8 = LLT::vector(16, 8); in setLegalizerInfoSSE2() local
329 for (auto Ty : {v16s8, v8s16, v4s32, v2s64}) in setLegalizerInfoSSE2()
345 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { in setLegalizerInfoSSE2()
349 for (const auto &Ty : {v16s8, v8s16, v4s32, v2s64}) { in setLegalizerInfoSSE2()
368 const LLT v16s8 = LLT::vector(16, 8); in setLegalizerInfoAVX() local
390 for (auto Ty : {v16s8, v8s16, v4s32, v2s64}) { in setLegalizerInfoAVX()
401 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { in setLegalizerInfoAVX()
443 const LLT v16s8 = LLT::vector(16, 8); in setLegalizerInfoAVX512() local
472 for (auto Ty : {v32s8, v16s16, v8s32, v4s64, v16s8, v8s16, v4s32, v2s64}) { in setLegalizerInfoAVX512()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86LegalizerInfo.cpp | 319 const LLT v16s8 = LLT::vector(16, 8); in setLegalizerInfoSSE2() local
334 for (auto Ty : {v16s8, v8s16, v4s32, v2s64}) in setLegalizerInfoSSE2()
350 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { in setLegalizerInfoSSE2()
354 for (const auto &Ty : {v16s8, v8s16, v4s32, v2s64}) { in setLegalizerInfoSSE2()
373 const LLT v16s8 = LLT::vector(16, 8); in setLegalizerInfoAVX() local
395 for (auto Ty : {v16s8, v8s16, v4s32, v2s64}) { in setLegalizerInfoAVX()
406 {v16s8, v32s8, v8s16, v16s16, v4s32, v8s32, v2s64, v4s64}) { in setLegalizerInfoAVX()
448 const LLT v16s8 = LLT::vector(16, 8); in setLegalizerInfoAVX512() local
477 for (auto Ty : {v32s8, v16s16, v8s32, v4s64, v16s8, v8s16, v4s32, v2s64}) { in setLegalizerInfoAVX512()
|
| /external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
| D | AArch64LegalizerInfo.cpp | 48 const LLT v16s8 = LLT::vector(16, 8); in AArch64LegalizerInfo() local
60 v16s8, v8s16, v4s32, in AArch64LegalizerInfo()
108 .legalFor({s32, s64, v2s32, v4s32, v4s16, v8s16, v16s8, v8s8}) in AArch64LegalizerInfo()
133 {v16s8, v16s8}, in AArch64LegalizerInfo()
280 {v16s8, p0, 128, 8}, in AArch64LegalizerInfo()
308 {v16s8, p0, 128, 8}, in AArch64LegalizerInfo()
350 {v16s8, v16s8}}) in AArch64LegalizerInfo()
475 .legalForCartesianProduct({s1, s8, s16, s32, s64, s128, v16s8, v8s8, v4s8, in AArch64LegalizerInfo()
592 VecTy == v16s8 || VecTy == v2s32 || VecTy == v2p0; in AArch64LegalizerInfo()
623 {v16s8, s8}, in AArch64LegalizerInfo()
[all …]
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64LegalizerInfo.cpp | 44 const LLT v16s8 = LLT::vector(16, 8); in AArch64LegalizerInfo() local
89 .legalFor({s32, s64, v2s32, v4s32, v2s64, v8s16, v16s8}) in AArch64LegalizerInfo()
255 {v16s8, p0, 128, 8}, in AArch64LegalizerInfo()
284 {v16s8, p0, 128, 8}, in AArch64LegalizerInfo()
320 {v16s8, v16s8}}) in AArch64LegalizerInfo()
435 .legalForCartesianProduct({s1, s8, s16, s32, s64, s128, v16s8, v8s8, v4s8, in AArch64LegalizerInfo()
579 {s32, s64, v8s8, v16s8, v4s16, v8s16, v2s32, v4s32}) in AArch64LegalizerInfo()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsLegalizerInfo.cpp | 59 const LLT v16s8 = LLT::vector(16, 8); in MipsLegalizerInfo() local
69 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
91 CheckTy0Ty1MemSizeAlign(Query, {{v16s8, p0, 128, false}, in MipsLegalizerInfo()
149 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
213 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsLegalizerInfo.cpp | 75 const LLT v16s8 = LLT::vector(16, 8); in MipsLegalizerInfo() local
85 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
115 Query, {{v16s8, p0, 128, NoAlignRequirements}, in MipsLegalizerInfo()
200 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
283 if (ST.hasMSA() && CheckTyN(0, Query, {v16s8, v8s16, v4s32, v2s64})) in MipsLegalizerInfo()
|
| /external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/ |
| D | legalize-select.mir | 81 name: v16s8
88 ; CHECK-LABEL: name: v16s8
|