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/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dgfx-callable-argument-types.ll99 ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
101 ; GFX9-NEXT: v_writelane_b32 v40, s33, 2
102 ; GFX9-NEXT: v_writelane_b32 v40, s30, 0
109 ; GFX9-NEXT: v_writelane_b32 v40, s31, 1
112 ; GFX9-NEXT: v_readlane_b32 s4, v40, 0
113 ; GFX9-NEXT: v_readlane_b32 s5, v40, 1
115 ; GFX9-NEXT: v_readlane_b32 s33, v40, 2
117 ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload
127 ; GFX10-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
130 ; GFX10-NEXT: v_writelane_b32 v40, s33, 2
[all …]
Dgfx-callable-preserved-registers.ll12 ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
14 ; GFX9-NEXT: v_writelane_b32 v40, s33, 4
15 ; GFX9-NEXT: v_writelane_b32 v40, s34, 0
16 ; GFX9-NEXT: v_writelane_b32 v40, s35, 1
17 ; GFX9-NEXT: v_writelane_b32 v40, s30, 2
23 ; GFX9-NEXT: v_writelane_b32 v40, s31, 3
28 ; GFX9-NEXT: v_readlane_b32 s4, v40, 2
29 ; GFX9-NEXT: v_readlane_b32 s5, v40, 3
30 ; GFX9-NEXT: v_readlane_b32 s35, v40, 1
31 ; GFX9-NEXT: v_readlane_b32 s34, v40, 0
[all …]
Dcall-preserved-registers.ll28 ; GCN: v_writelane_b32 v40, s33, 4
29 ; GCN: v_writelane_b32 v40, s34, 0
30 ; GCN: v_writelane_b32 v40, s35, 1
31 ; GCN: v_writelane_b32 v40, s30, 2
32 ; GCN: v_writelane_b32 v40, s31, 3
38 ; MUBUF-DAG: v_readlane_b32 s4, v40, 2
39 ; MUBUF-DAG: v_readlane_b32 s5, v40, 3
40 ; FLATSCR-DAG: v_readlane_b32 s0, v40, 2
41 ; FLATSCR-DAG: v_readlane_b32 s1, v40, 3
42 ; GCN: v_readlane_b32 s35, v40, 1
[all …]
Dcross-block-use-is-not-abi-copy.ll31 ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
33 ; GCN-NEXT: v_writelane_b32 v40, s33, 2
34 ; GCN-NEXT: v_writelane_b32 v40, s30, 0
40 ; GCN-NEXT: v_writelane_b32 v40, s31, 1
42 ; GCN-NEXT: v_readlane_b32 s4, v40, 0
43 ; GCN-NEXT: v_readlane_b32 s5, v40, 1
45 ; GCN-NEXT: v_readlane_b32 s33, v40, 2
47 ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload
65 ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
67 ; GCN-NEXT: v_writelane_b32 v40, s33, 2
[all …]
Dnested-calls.ll15 ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 ; 4-byte Folded Spill
17 ; GCN-DAG: v_writelane_b32 v40, s33, 2
20 ; GCN-DAG: v_writelane_b32 v40, s30, 0
21 ; GCN-DAG: v_writelane_b32 v40, s31, 1
25 ; GCN: v_readlane_b32 s4, v40, 0
26 ; GCN: v_readlane_b32 s5, v40, 1
29 ; GCN-NEXT: v_readlane_b32 s33, v40, 2
31 ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 ; 4-byte Folded Reload
Dspill-csr-frame-ptr-reg-copy.ll5 ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Spill
7 ; GCN: v_writelane_b32 v40, s33, 2
13 ; GCN: v_readlane_b32 s33, v40, 2
15 ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s32 offset:4 ; 4-byte Folded Reload
Dvgpr-tuple-allocation.ll12 ; GFX9: buffer_store_dword v40, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
36 ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:12 ; 4-byte Folded Reload
42 ; GFX10: buffer_store_dword v40, off, s[0:3], s33 offset:12 ; 4-byte Folded Spill
68 ; GFX10-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:12
90 ; GFX9: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
100 ; GFX9-NEXT: v_mov_b32_e32 v40, v12
117 ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Reload
124 ; GFX10: buffer_store_dword v40, off, s[0:3], s33 offset:16 ; 4-byte Folded Spill
136 ; GFX10-NEXT: v_mov_b32_e32 v40, v16
146 ; GFX10-NEXT: image_gather4_c_b_cl v[0:3], [v44, v43, v42, v41, v40], s[36:43], s[4:7] dmask:0x1 di…
[all …]
Dindirect-call.ll210 ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
230 ; GCN-NEXT: v_mov_b32_e32 v40, v31
253 ; GCN-NEXT: v_mov_b32_e32 v31, v40
278 ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Reload
300 ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
320 ; GCN-NEXT: v_mov_b32_e32 v40, v31
344 ; GCN-NEXT: v_mov_b32_e32 v31, v40
369 ; GCN-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Reload
391 ; GCN-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
411 ; GCN-NEXT: v_mov_b32_e32 v40, v31
[all …]
Dcall-graph-register-usage.ll16 ; GCN: v_writelane_b32 v40, s33, 2
17 ; GCN: v_writelane_b32 v40, s30, 0
18 ; GCN: v_writelane_b32 v40, s31, 1
20 ; GCN: v_readlane_b32 s4, v40, 0
21 ; GCN: v_readlane_b32 s5, v40, 1
22 ; GCN: v_readlane_b32 s33, v40, 2
Dmul24-pass-ordering.ll202 ; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Spill
205 ; GFX9-NEXT: v_mov_b32_e32 v40, v1
208 ; GFX9-NEXT: v_mul_u32_u24_e32 v0, v41, v40
210 ; GFX9-NEXT: v_and_b32_e32 v42, 0xffffff, v40
212 ; GFX9-NEXT: v_mad_u32_u24 v40, v41, v40, v42
213 ; GFX9-NEXT: v_mov_b32_e32 v0, v40
215 ; GFX9-NEXT: v_add_u32_e32 v0, v40, v42
219 ; GFX9-NEXT: buffer_load_dword v40, off, s[0:3], s33 offset:8 ; 4-byte Folded Reload
Dcall-waitcnt.ll65 ; GCN-NEXT: v_mov_b32_e32 v40, 0
67 ; GCN-NEXT: global_store_dword v40, v40, s[34:35]
87 ; GCN-NEXT: v_mov_b32_e32 v40, 0
89 ; GCN-NEXT: global_store_dword v40, v0, s[34:35]
/external/eigen/test/
Dgeo_orthomethods.cpp65 Vector4 v40 = Vector4::Random(), in orthomethods_3() local
68 v40.w() = v41.w() = v42.w() = 0; in orthomethods_3()
69 v42.template head<3>() = v40.template head<3>().cross(v41.template head<3>()); in orthomethods_3()
70 VERIFY_IS_APPROX(v40.cross3(v41), v42); in orthomethods_3()
71 VERIFY_IS_MUCH_SMALLER_THAN(v40.cross3(Vector4::Random()).dot(v40), Scalar(1)); in orthomethods_3()
/external/llvm-project/llvm/test/Analysis/MemorySSA/
Dloop-rotate-simplified-clone.ll13 %v40 = phi float (float)* [ @foo, %preheader ], [ %v43, %crit_edge ]
14 %v41 = call float %v40(float undef)
/external/llvm/test/Transforms/InstCombine/
Ddemand_shrink_nsw.ll19 %v40 = xor i32 %v37, %v39
20 %v41 = shl nsw nuw i32 %v40, 1
/external/llvm-project/llvm/test/Transforms/InstCombine/
Ddemand_shrink_nsw.ll25 %v40 = xor i32 %v37, %v39
26 %v41 = shl nsw nuw i32 %v40, 1
/external/jackson-databind/src/test/java/com/fasterxml/jackson/databind/deser/creators/
DBigCreatorTest.java35 @JsonProperty("v39") int v39, @JsonProperty("v40") int v40 in Biggie() argument
41 v31, v32, v33, v34, v35, v36, v37, v38, v39, v40, in Biggie()
/external/llvm-project/llvm/test/CodeGen/Hexagon/
Dupper-mpy.ll35 %v10 = phi i32* [ %v40, %b3 ], [ %v3, %b2 ]
67 %v40 = getelementptr inbounds i32, i32* %v10, i32 -1
74 %v45 = icmp ult i32* %v44, %v40
Dswp-phi-chains.ll82 %v40 = ashr exact i32 %v39, 16
83 %v41 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v11, i32 %v40, i32 %v34)
89 %v46 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v45, i32 %v40, i32 %v37)
91 %v47 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v9, i32 %v40, i32 0)
97 %v52 = tail call i32 @llvm.hexagon.M2.mpy.acc.sat.ll.s1(i32 %v51, i32 %v40, i32 %v49)
Dswp-reuse-phi-6.ll61 %v40 = tail call <16 x i32> @llvm.hexagon.V6.lo(<32 x i32> %v23) #2
63 %v42 = tail call <16 x i32> @llvm.hexagon.V6.vlalignbi(<16 x i32> %v40, <16 x i32> %v41, i32 2) #2
68 %v47 = tail call <16 x i32> @llvm.hexagon.V6.valignbi(<16 x i32> %v46, <16 x i32> %v40, i32 2) #2
72 %v51 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %v40, <16 x i32> %v47) #2
74 …%v53 = tail call <16 x i32> @llvm.hexagon.V6.vmpyiwb.acc(<16 x i32> %v52, <16 x i32> %v40, i32 101…
Dbug6757-endloop.ll90 %v39 = phi i32 [ %v5, %b2 ], [ %v40, %b12 ]
91 %v40 = add i32 %v39, -1
95 %v41 = icmp eq i32 %v40, 0
Dmulti-cycle.ll56 %v40 = phi <16 x i32> [ %v27, %b18 ], [ %v51, %b32 ]
57 %v41 = phi <16 x i32> [ %v15, %b18 ], [ %v40, %b32 ]
66 %v50 = tail call <16 x i32> @llvm.hexagon.V6.valignb(<16 x i32> %v40, <16 x i32> %v41, i32 62)
68 %v52 = tail call <16 x i32> @llvm.hexagon.V6.valignb(<16 x i32> %v51, <16 x i32> %v40, i32 2)
Dsdr-reg-profit.ll39 %v15 = phi i32 [ 0, %b2 ], [ %v40, %b8 ]
64 %v40 = trunc i64 %v39 to i32
91 %v65 = tail call i64 @llvm.hexagon.A2.combinew(i32 %v40, i32 %v61)
Dvect_setcc_v2i16.ll43 %v16 = add <2 x i32> %v15, %v40
60 %v27 = phi <2 x i32> [ zeroinitializer, %b7 ], [ %v40, %b6 ]
73 %v40 = add <2 x i32> %v27, %v38
Dconstext-replace.ll115 %v40 = load i32, i32* @g0, align 4
116 store i32 %v40, i32* %v34, align 4
117 %v41 = getelementptr inbounds [13595 x i32], [13595 x i32]* @g1, i32 0, i32 %v40
119 %v42 = getelementptr inbounds [13595 x i32], [13595 x i32]* @g2, i32 0, i32 %v40
/external/llvm-project/llvm/test/MC/AMDGPU/
Dgfx1030_new.s87 image_bvh_intersect_ray v[39:42], [v50, v46, v23, v17, v16, v15, v21, v20, v19, v37, v40], s[12:15]
93 image_bvh64_intersect_ray v[39:42], [v50, v46, v23, v17, v16, v15, v21, v20, v19, v37, v40, v42], s…

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