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Searched refs:v8b (Results 1 – 11 of 11) sorted by relevance

/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
DAArch64SchedKryoDetails.td1029 (instregex "LD1One(v8b|v4h|v2s|v1d)$")>;
1053 (instregex "LD1One(v8b|v4h|v2s|v1d)_POST$")>;
1071 (instregex "LD1Three(v8b|v4h|v2s|v1d)$")>;
1083 (instregex "LD1Four(v8b|v4h|v2s|v1d)$")>;
1089 (instregex "LD1Three(v8b|v4h|v2s|v1d)_POST$")>;
1095 (instregex "LD1Four(v8b|v4h|v2s|v1d)_POST$")>;
1107 (instregex "LD(1|2)Two(v8b|v4h|v2s|v1d)$")>;
1119 (instregex "LD(1|2)Two(v8b|v4h|v2s|v1d)_POST$")>;
1131 (instregex "LD1R(v8b|v4h|v2s|v1d)$")>;
1143 (instregex "LD1R(v8b|v4h|v2s|v1d)_POST$")>;
[all …]
DAArch64SchedFalkorDetails.td993 …(instregex "^ST1(One(v8b|v4h|v2s|v1d)|(i8|i16|i32|i64)|One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))…
995 … (instregex "^ST1(One(v8b|v4h|v2s|v1d)_POST|(i8|i16|i32|i64)_POST)$")>;
997 (instregex "^ST2(Two(v8b|v4h|v2s)|(i8|i16|i32|i64))$")>;
999 … (instregex "^ST1(One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))_POST$")>;
1001 (instregex "^ST2(Two(v8b|v4h|v2s)|(i8|i16|i32|i64))_POST$")>;
1004 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))$")>;
1013 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))_POST$")>;
1025 (instregex "^ST3Three(v8b|v4h|v2s)$")>;
1028 (instregex "^ST3Three(v8b|v4h|v2s)_POST$")>;
1042 (instregex "^ST4Four(v8b|v4h|v2s)$")>;
[all …]
DAArch64InstrFormats.td9232 def v8b : BaseSIMDLdSt<0, 1, opcode, 0b00, asm,
9305 def v8b : BaseSIMDLdSt<0, 0, opcode, 0b00, asm, (outs),
9545 def v8b : BaseSIMDLdR<0, R, opcode, S, 0b00, asm,
/external/llvm-project/llvm/lib/Target/AArch64/
DAArch64SchedKryoDetails.td1029 (instregex "LD1One(v8b|v4h|v2s|v1d)$")>;
1053 (instregex "LD1One(v8b|v4h|v2s|v1d)_POST$")>;
1071 (instregex "LD1Three(v8b|v4h|v2s|v1d)$")>;
1083 (instregex "LD1Four(v8b|v4h|v2s|v1d)$")>;
1089 (instregex "LD1Three(v8b|v4h|v2s|v1d)_POST$")>;
1095 (instregex "LD1Four(v8b|v4h|v2s|v1d)_POST$")>;
1107 (instregex "LD(1|2)Two(v8b|v4h|v2s|v1d)$")>;
1119 (instregex "LD(1|2)Two(v8b|v4h|v2s|v1d)_POST$")>;
1131 (instregex "LD1R(v8b|v4h|v2s|v1d)$")>;
1143 (instregex "LD1R(v8b|v4h|v2s|v1d)_POST$")>;
[all …]
DAArch64SchedFalkorDetails.td993 …(instregex "^ST1(One(v8b|v4h|v2s|v1d)|(i8|i16|i32|i64)|One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))…
995 … (instregex "^ST1(One(v8b|v4h|v2s|v1d)_POST|(i8|i16|i32|i64)_POST)$")>;
997 (instregex "^ST2(Two(v8b|v4h|v2s)|(i8|i16|i32|i64))$")>;
999 … (instregex "^ST1(One(v16b|v8h|v4s|v2d)|Two(v8b|v4h|v2s|v1d))_POST$")>;
1001 (instregex "^ST2(Two(v8b|v4h|v2s)|(i8|i16|i32|i64))_POST$")>;
1004 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))$")>;
1013 … (instregex "^ST1(Two(v16b|v8h|v4s|v2d)|(Three|Four)(v8b|v4h|v2s|v1d))_POST$")>;
1025 (instregex "^ST3Three(v8b|v4h|v2s)$")>;
1028 (instregex "^ST3Three(v8b|v4h|v2s)_POST$")>;
1042 (instregex "^ST4Four(v8b|v4h|v2s)$")>;
[all …]
DAArch64InstrFormats.td9630 def v8b : BaseSIMDLdSt<0, 1, opcode, 0b00, asm,
9703 def v8b : BaseSIMDLdSt<0, 0, opcode, 0b00, asm, (outs),
9943 def v8b : BaseSIMDLdR<0, R, opcode, S, 0b00, asm,
/external/llvm/lib/Target/AArch64/
DAArch64SchedKryoDetails.td1012 (instregex "LD1One(v8b|v4h|v2s|v1d)$")>;
1036 (instregex "LD1One(v8b|v4h|v2s|v1d)_POST$")>;
1054 (instregex "LD1Three(v8b|v4h|v2s|v1d)$")>;
1066 (instregex "LD1Four(v8b|v4h|v2s|v1d)$")>;
1072 (instregex "LD1Three(v8b|v4h|v2s|v1d)_POST$")>;
1078 (instregex "LD1Four(v8b|v4h|v2s|v1d)_POST$")>;
1090 (instregex "LD(1|2)Two(v8b|v4h|v2s|v1d)$")>;
1102 (instregex "LD(1|2)Two(v8b|v4h|v2s|v1d)_POST$")>;
1114 (instregex "LD1R(v8b|v4h|v2s|v1d)$")>;
1126 (instregex "LD1R(v8b|v4h|v2s|v1d)_POST$")>;
[all …]
DAArch64InstrFormats.td8311 def v8b : BaseSIMDLdSt<0, 1, opcode, 0b00, asm,
8384 def v8b : BaseSIMDLdSt<0, 0, opcode, 0b00, asm, (outs),
8624 def v8b : BaseSIMDLdR<0, R, opcode, S, 0b00, asm,
/external/elfutils/
DGPG-KEY107 08rMX3rFDTtizwN7g7ZBkDDiZO+BIKQPt/awA9NM+tda02hyfQokBBi+v8b/iKif
/external/mesa3d/src/amd/compiler/
Daco_ir.h277 v8b = v8 | (1 << 7), enumerator
334 static constexpr RegClass v8b{RegClass::v8b};
Daco_print_ir.cpp83 case RegClass::v8b: fprintf(output, " v8b: "); return; in print_reg_class()