/external/llvm-project/llvm/test/MC/AMDGPU/ |
D | literal16.s | 3 v_add_f16 v1, 0, v2 label 6 v_add_f16 v1, 0.0, v2 label 9 v_add_f16 v1, v2, 0 label 12 v_add_f16 v1, v2, 0.0 label 15 v_add_f16 v1, -0.0, v2 label 18 v_add_f16 v1, 1.0, v2 label 21 v_add_f16 v1, -1.0, v2 label 24 v_add_f16 v1, -0.5, v2 label 27 v_add_f16 v1, 0.5, v2 label 30 v_add_f16 v1, 2.0, v2 label [all …]
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D | literal16-err.s | 3 v_add_f16 v1, 0xfffff, v2 label 6 v_add_f16 v1, 0x10000, v2 label 9 v_add_f16 v1, 0xffffffffffff000f, v2 label 12 v_add_f16 v1, 0x1000ffff, v2 label 15 v_add_f16 v1, -32769, v2 label 18 v_add_f16 v1, 65536, v2 label
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D | vop3-gfx9.s | 765 v_add_f16 v0, s[0:1], v0 label 770 v_add_f16 v0, v[0:1], v0 label 775 v_add_f16 v0, v0, s[0:1] label 780 v_add_f16 v0, v0, v[0:1] label
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D | vop_dpp.s | 460 v_add_f16 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label 663 v_add_f16 v1, v[2:3], v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label 668 v_add_f16 v1, v3, v[2:3] row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
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D | vop_sdwa.s | 456 v_add_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label 1126 v_add_f16 v1, v[2:3], v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label 1130 v_add_f16 v1, s[2:3], v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label 1134 v_add_f16 v1, v2, v[2:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label 1138 v_add_f16 v1, v2, s[2:3] dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label
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D | vop3-convert.s | 321 v_add_f16 v1, v2, v3 label
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D | gfx7_unsupported.s | 781 v_add_f16 v0, s[0:1], v0 label
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D | gfx8_asm_all.s | 39883 v_add_f16 v5, v1, v2 label 39886 v_add_f16 v255, v1, v2 label 39889 v_add_f16 v5, v255, v2 label 39892 v_add_f16 v5, s1, v2 label 39895 v_add_f16 v5, s101, v2 label 39898 v_add_f16 v5, flat_scratch_lo, v2 label 39901 v_add_f16 v5, flat_scratch_hi, v2 label 39904 v_add_f16 v5, vcc_lo, v2 label 39907 v_add_f16 v5, vcc_hi, v2 label 39910 v_add_f16 v5, tba_lo, v2 label [all …]
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D | gfx9_asm_all.s | 33773 v_add_f16 v5, v1, v2 label 33776 v_add_f16 v255, v1, v2 label 33779 v_add_f16 v5, v255, v2 label 33782 v_add_f16 v5, s1, v2 label 33785 v_add_f16 v5, s101, v2 label 33788 v_add_f16 v5, flat_scratch_lo, v2 label 33791 v_add_f16 v5, flat_scratch_hi, v2 label 33794 v_add_f16 v5, vcc_lo, v2 label 33797 v_add_f16 v5, vcc_hi, v2 label 33800 v_add_f16 v5, m0, v2 label [all …]
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/external/llvm/test/MC/AMDGPU/ |
D | vop2.s | 401 v_add_f16 v1, v2, v3 label
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D | vop_dpp.s | 422 v_add_f16 v1, v2, v3 row_shl:1 row_mask:0xa bank_mask:0x1 bound_ctrl:0 label
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D | vop_sdwa.s | 429 v_add_f16 v1, v2, v3 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1 src1_sel:BYTE_2 label
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/external/llvm/lib/Target/AMDGPU/ |
D | VIInstructions.td | 49 defm V_ADD_F16 : VOP2Inst <vop2<0, 0x1f>, "v_add_f16", VOP_F16_F16_F16>;
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/external/llvm-project/llvm/docs/ |
D | AMDGPUOperandSyntax.rst | 1033 v_add_f16 v0, -1, 0 // src0 = 0xFFFF (NaN) 1097 v_add_f16 v0, 1.0, 0 // src0 = 0x3C00 (1.0) 1109 v_add_f16 v1, 65500.0, v2 // ok for f16. 1118 v_add_f16 v1, 65600.0, v2 // overflow
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/external/mesa3d/src/amd/compiler/ |
D | aco_optimizer.cpp | 543 case aco_opcode::v_add_f16: in can_swap_operands() 926 } else if (info.is_neg() && instr->opcode == aco_opcode::v_add_f16) { in label_instruction() 2713 bool mad16 = instr->opcode == aco_opcode::v_add_f16 || in combine_instruction()
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D | aco_lower_to_hw_instr.cpp | 101 case fadd16: return aco_opcode::v_add_f16; in get_reduce_opcode() 1037 bld.vop2_sdwa(aco_opcode::v_add_f16, dst, op, Operand(0u)); in copy_constant()
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D | aco_instruction_selection.cpp | 1790 emit_vop2_instruction(ctx, instr, aco_opcode::v_add_f16, dst, true); in visit_alu_instr() 2175 src = bld.vop2(aco_opcode::v_add_f16, bld.def(v2b), Operand(0u), src); in visit_alu_instr()
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/external/llvm-project/llvm/lib/Target/AMDGPU/ |
D | VOP2Instructions.td | 641 defm V_ADD_F16 : VOP2Inst <"v_add_f16", VOP_F16_F16_F16, any_fadd>;
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
D | VOP2Instructions.td | 620 defm V_ADD_F16 : VOP2Inst <"v_add_f16", VOP_F16_F16_F16, fadd>;
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/external/llvm-project/llvm/docs/AMDGPU/ |
D | AMDGPUAsmGFX8.rst | 876 …v_add_f16 :ref:`vdst<amdgpu_synid8_vdst32_0>`, :ref:`src0<amdgpu_synid8_src32_0>`…
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D | AMDGPUAsmGFX9.rst | 1063 …v_add_f16 :ref:`vdst<amdgpu_synid9_vdst32_0>`, :ref:`src0<amdgpu_synid9_src32_0>`…
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D | AMDGPUAsmGFX10.rst | 1433 …v_add_f16 :ref:`vdst<amdgpu_synid10_vdst32_0>`, :ref:`src0<am…
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