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Searched refs:v_addc_u32_e64 (Results 1 – 25 of 27) sorted by relevance

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/external/llvm-project/llvm/test/MC/AMDGPU/
Dvop-err.s174 v_addc_u32_e64 v0, s[0:1], s2, v2, vcc label
177 v_addc_u32_e64 v0, s[0:1], v2, s2, vcc label
180 v_addc_u32_e64 v0, s[0:1], s2, s2, vcc label
183 v_addc_u32_e64 v0, s[0:1], s0, v2, s[0:1] label
186 v_addc_u32_e64 v0, s[0:1], v2, s0, s[0:1] label
189 v_addc_u32_e64 v0, s[0:1], s0, s0, s[0:1] label
192 v_addc_u32_e64 v0, s[0:1], s2, v2, s[0:1] label
195 v_addc_u32_e64 v0, s[0:1], v2, s2, s[0:1] label
198 v_addc_u32_e64 v0, s[0:1], s2, s2, s[0:1] label
Dvop2-err.s59 v_addc_u32_e64 v1, s[0:1], v2, v3, 123 label
Dvop2.s360 v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] label
364 v_addc_u32_e64 v1, vcc, v2, v3, vcc label
Dgfx9_unsupported.s196 v_addc_u32_e64 v0, s[0:1], s0, s0, s[0:1] label
Dgfx10_unsupported.s128 v_addc_u32_e64 v0, s[0:1], s0, s0, s[0:1] label
Dgfx7_asm_all.s38739 v_addc_u32_e64 v5, s[12:13], v1, v2, s[6:7] label
38742 v_addc_u32_e64 v255, s[12:13], v1, v2, s[6:7] label
38745 v_addc_u32_e64 v5, s[14:15], v1, v2, s[6:7] label
38748 v_addc_u32_e64 v5, s[102:103], v1, v2, s[6:7] label
38751 v_addc_u32_e64 v5, flat_scratch, v1, v2, s[6:7] label
38754 v_addc_u32_e64 v5, vcc, v1, v2, s[6:7] label
38757 v_addc_u32_e64 v5, tba, v1, v2, s[6:7] label
38760 v_addc_u32_e64 v5, tma, v1, v2, s[6:7] label
38763 v_addc_u32_e64 v5, ttmp[10:11], v1, v2, s[6:7] label
38766 v_addc_u32_e64 v5, s[12:13], v255, v2, s[6:7] label
[all …]
Dgfx8_asm_all.s39601 v_addc_u32_e64 v5, s[12:13], v1, v2, s[6:7] label
39604 v_addc_u32_e64 v255, s[12:13], v1, v2, s[6:7] label
39607 v_addc_u32_e64 v5, s[14:15], v1, v2, s[6:7] label
39610 v_addc_u32_e64 v5, s[100:101], v1, v2, s[6:7] label
39613 v_addc_u32_e64 v5, flat_scratch, v1, v2, s[6:7] label
39616 v_addc_u32_e64 v5, vcc, v1, v2, s[6:7] label
39619 v_addc_u32_e64 v5, tba, v1, v2, s[6:7] label
39622 v_addc_u32_e64 v5, tma, v1, v2, s[6:7] label
39625 v_addc_u32_e64 v5, ttmp[10:11], v1, v2, s[6:7] label
39628 v_addc_u32_e64 v5, s[12:13], v255, v2, s[6:7] label
[all …]
/external/llvm/test/MC/AMDGPU/
Dvop2.s340 v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] label
344 v_addc_u32_e64 v1, s[0:1], v2, v3, -1 label
348 v_addc_u32_e64 v1, vcc, v2, v3, -1 label
352 v_addc_u32_e64 v1, vcc, v2, v3, vcc label
Dvop2-err.s62 v_addc_u32_e64 v1, s[0:1], v2, v3, 123 label
/external/llvm/test/MC/Disassembler/AMDGPU/
Dvop2_vi.txt144 # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0xaa,0x01]
147 # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x0…
150 # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x0…
153 # FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, -1 ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x06,0x03]
156 # FIXME: v_addc_u32_e64 v1, vcc, v2, v3, -1 ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0x06,0x03]
159 # VI: v_addc_u32_e64 v1, vcc, v2, v3, vcc ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0xaa,0x01]
/external/llvm-project/llvm/test/MC/Disassembler/AMDGPU/
Dvop2_vi.txt150 # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, vcc ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0xaa,0x01]
153 # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x0…
156 # VI: v_addc_u32_e64 v1, s[0:1], v2, v3, s[2:3] ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x0a,0x0…
159 # FIXME: v_addc_u32_e64 v1, s[0:1], v2, v3, -1 ; encoding: [0x01,0x00,0x1c,0xd1,0x02,0x07,0x06,0x03]
162 # FIXME: v_addc_u32_e64 v1, vcc, v2, v3, -1 ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0x06,0x03]
165 # VI: v_addc_u32_e64 v1, vcc, v2, v3, vcc ; encoding: [0x01,0x6a,0x1c,0xd1,0x02,0x07,0xaa,0x01]
Dvop3_vi.txt504 # VI: v_addc_u32_e64 v84, s[4:5], v13, v31, vcc clamp ; encoding: [0x54,0x84,0x1c,0xd1,0x0d,0x3f,0x…
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dudiv64.ll48 ; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
71 ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
108 ; GCN-NEXT: v_addc_u32_e64 v6, s[0:1], 0, v1, s[0:1]
110 ; GCN-NEXT: v_addc_u32_e64 v8, s[0:1], 0, v1, s[0:1]
174 ; GCN-IR-NEXT: v_addc_u32_e64 v5, s[0:1], -1, 0, vcc
266 ; GCN-NEXT: v_addc_u32_e64 v8, vcc, v5, v9, s[4:5]
288 ; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5]
324 ; GCN-NEXT: v_addc_u32_e64 v9, s[4:5], 0, v5, s[4:5]
329 ; GCN-NEXT: v_addc_u32_e64 v11, s[4:5], 0, v5, s[4:5]
755 ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v2, v4, s[2:3]
[all …]
Dsdiv64.ll55 ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v2, v4, s[0:1]
78 ; GCN-NEXT: v_addc_u32_e64 v2, vcc, v2, v5, s[0:1]
118 ; GCN-NEXT: v_addc_u32_e64 v6, s[0:1], 0, v1, s[0:1]
120 ; GCN-NEXT: v_addc_u32_e64 v8, s[0:1], 0, v1, s[0:1]
200 ; GCN-IR-NEXT: v_addc_u32_e64 v5, s[0:1], -1, 0, vcc
303 ; GCN-NEXT: v_addc_u32_e64 v9, vcc, v6, v10, s[4:5]
325 ; GCN-NEXT: v_addc_u32_e64 v6, vcc, v6, v8, s[4:5]
366 ; GCN-NEXT: v_addc_u32_e64 v11, s[4:5], 0, v6, s[4:5]
371 ; GCN-NEXT: v_addc_u32_e64 v13, s[4:5], 0, v6, s[4:5]
1071 ; GCN-IR-NEXT: v_addc_u32_e64 v5, s[0:1], -1, 0, vcc
[all …]
Durem64.ll50 ; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
72 ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
173 ; GCN-IR-NEXT: v_addc_u32_e64 v5, s[0:1], -1, 0, vcc
276 ; GCN-NEXT: v_addc_u32_e64 v8, vcc, v5, v9, s[4:5]
298 ; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5]
794 ; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
816 ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
874 ; GCN-IR-NEXT: v_addc_u32_e64 v1, s[2:3], 0, -1, vcc
999 ; GCN-NEXT: v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
1020 ; GCN-NEXT: v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
[all …]
Dsrem64.ll50 ; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
72 ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v3, v6, s[0:1]
173 ; GCN-IR-NEXT: v_addc_u32_e64 v5, s[0:1], -1, 0, vcc
281 ; GCN-NEXT: v_addc_u32_e64 v8, vcc, v5, v9, s[4:5]
303 ; GCN-NEXT: v_addc_u32_e64 v5, vcc, v5, v7, s[4:5]
936 ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v2, v4, s[0:1]
959 ; GCN-NEXT: v_addc_u32_e64 v2, vcc, v2, v5, s[0:1]
1081 ; GCN-IR-NEXT: v_addc_u32_e64 v5, s[0:1], -1, 0, vcc
1251 ; GCN-IR-NEXT: v_addc_u32_e64 v5, s[0:1], -1, 0, vcc
1368 ; GCN-NEXT: v_addc_u32_e64 v4, vcc, v3, v5, s[0:1]
[all …]
Damdgpu-codegenprepare-idiv.ll4972 ; GCN-NEXT: v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
4995 ; GCN-NEXT: v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
5032 ; GCN-NEXT: v_addc_u32_e64 v6, s[0:1], 0, v1, s[0:1]
5034 ; GCN-NEXT: v_addc_u32_e64 v8, s[0:1], 0, v1, s[0:1]
5189 ; GCN-NEXT: v_addc_u32_e64 v3, vcc, v1, v4, s[2:3]
5210 ; GCN-NEXT: v_addc_u32_e64 v1, vcc, v1, v5, s[2:3]
5355 ; GCN-NEXT: v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
5379 ; GCN-NEXT: v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
5616 ; GCN-NEXT: v_addc_u32_e64 v2, vcc, v1, v3, s[0:1]
5638 ; GCN-NEXT: v_addc_u32_e64 v1, vcc, v1, v4, s[0:1]
[all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Durem.i64.ll59 ; CHECK-NEXT: v_addc_u32_e64 v9, s[4:5], v5, v8, vcc
235 ; CHECK-NEXT: v_addc_u32_e64 v5, s[4:5], v2, v4, vcc
404 ; GISEL-NEXT: v_addc_u32_e64 v12, s[4:5], v9, v13, vcc
435 ; GISEL-NEXT: v_addc_u32_e64 v9, vcc, 0, v9, s[4:5]
530 ; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v5, v11, vcc
561 ; GISEL-NEXT: v_addc_u32_e64 v5, vcc, 0, v5, s[4:5]
671 ; CGP-NEXT: v_addc_u32_e64 v13, s[4:5], v1, v12, vcc
830 ; CGP-NEXT: v_addc_u32_e64 v11, s[4:5], v5, v10, vcc
992 ; CHECK-NEXT: v_addc_u32_e64 v5, s[4:5], v3, v4, vcc
1171 ; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v6, v8, vcc
[all …]
Dudiv.i64.ll59 ; CHECK-NEXT: v_addc_u32_e64 v9, s[4:5], v5, v8, vcc
238 ; CHECK-NEXT: v_addc_u32_e64 v5, s[4:5], v2, v4, vcc
410 ; GISEL-NEXT: v_addc_u32_e64 v12, s[4:5], v9, v13, vcc
441 ; GISEL-NEXT: v_addc_u32_e64 v9, vcc, 0, v9, s[4:5]
537 ; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v5, v11, vcc
568 ; GISEL-NEXT: v_addc_u32_e64 v5, vcc, 0, v5, s[4:5]
679 ; CGP-NEXT: v_addc_u32_e64 v13, s[4:5], v1, v12, vcc
841 ; CGP-NEXT: v_addc_u32_e64 v11, s[4:5], v5, v10, vcc
1006 ; CHECK-NEXT: v_addc_u32_e64 v5, s[4:5], v3, v4, vcc
1187 ; GISEL-NEXT: v_addc_u32_e64 v10, s[4:5], v6, v8, vcc
[all …]
Dsrem.i64.ll69 ; CHECK-NEXT: v_addc_u32_e64 v12, s[4:5], v8, v11, vcc
264 ; CHECK-NEXT: v_addc_u32_e64 v3, s[0:1], v1, v2, vcc
446 ; GISEL-NEXT: v_addc_u32_e64 v14, s[4:5], v9, v13, vcc
584 ; GISEL-NEXT: v_addc_u32_e64 v13, s[4:5], v7, v12, vcc
741 ; CGP-NEXT: v_addc_u32_e64 v16, s[4:5], v12, v15, vcc
914 ; CGP-NEXT: v_addc_u32_e64 v14, s[4:5], v10, v13, vcc
1084 ; CHECK-NEXT: v_addc_u32_e64 v6, s[4:5], v4, v5, vcc
1240 ; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v5, v7, vcc
1384 ; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v5, v7, vcc
1529 ; CGP-NEXT: v_addc_u32_e64 v10, s[4:5], v8, v9, vcc
[all …]
Dsdiv.i64.ll69 ; CHECK-NEXT: v_addc_u32_e64 v13, s[4:5], v9, v12, vcc
268 ; CHECK-NEXT: v_addc_u32_e64 v3, s[0:1], v1, v2, vcc
454 ; GISEL-NEXT: v_addc_u32_e64 v15, s[4:5], v10, v14, vcc
594 ; GISEL-NEXT: v_addc_u32_e64 v14, s[4:5], v9, v13, vcc
753 ; CGP-NEXT: v_addc_u32_e64 v17, s[4:5], v13, v16, vcc
930 ; CGP-NEXT: v_addc_u32_e64 v15, s[4:5], v11, v14, vcc
1104 ; CHECK-NEXT: v_addc_u32_e64 v6, s[4:5], v4, v5, vcc
1262 ; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v5, v7, vcc
1407 ; GISEL-NEXT: v_addc_u32_e64 v8, s[4:5], v5, v7, vcc
1553 ; CGP-NEXT: v_addc_u32_e64 v10, s[4:5], v8, v9, vcc
[all …]
Dcvt_f32_ubyte.ll1143 ; SI-NEXT: v_addc_u32_e64 v3, s[4:5], 0, 0, vcc
1179 ; VI-NEXT: v_addc_u32_e64 v3, s[4:5], 0, 0, vcc
Dssubsat.ll4633 ; GFX6-NEXT: v_addc_u32_e64 v1, s[6:7], v0, v1, s[6:7]
4649 ; GFX8-NEXT: v_addc_u32_e64 v1, s[6:7], v0, v1, s[6:7]
4813 ; GFX6-NEXT: v_addc_u32_e64 v1, s[2:3], v0, v1, s[2:3]
4829 ; GFX8-NEXT: v_addc_u32_e64 v1, s[2:3], v0, v1, s[2:3]
4880 ; GFX6-NEXT: v_addc_u32_e64 v1, s[0:1], v0, v1, s[0:1]
4896 ; GFX8-NEXT: v_addc_u32_e64 v1, s[0:1], v0, v1, s[0:1]
4948 ; GFX6-NEXT: v_addc_u32_e64 v4, s[6:7], v0, v10, s[6:7]
4957 ; GFX6-NEXT: v_addc_u32_e64 v6, s[6:7], v2, v10, s[6:7]
4974 ; GFX8-NEXT: v_addc_u32_e64 v4, s[6:7], v0, v10, s[6:7]
4983 ; GFX8-NEXT: v_addc_u32_e64 v6, s[6:7], v2, v10, s[6:7]
Dsaddsat.ll4647 ; GFX6-NEXT: v_addc_u32_e64 v1, s[6:7], v0, v1, s[6:7]
4663 ; GFX8-NEXT: v_addc_u32_e64 v1, s[6:7], v0, v1, s[6:7]
4827 ; GFX6-NEXT: v_addc_u32_e64 v1, s[2:3], v0, v1, s[2:3]
4843 ; GFX8-NEXT: v_addc_u32_e64 v1, s[2:3], v0, v1, s[2:3]
4894 ; GFX6-NEXT: v_addc_u32_e64 v1, s[0:1], v0, v1, s[0:1]
4910 ; GFX8-NEXT: v_addc_u32_e64 v1, s[0:1], v0, v1, s[0:1]
4962 ; GFX6-NEXT: v_addc_u32_e64 v4, s[6:7], v0, v10, s[6:7]
4971 ; GFX6-NEXT: v_addc_u32_e64 v6, s[6:7], v2, v10, s[6:7]
4988 ; GFX8-NEXT: v_addc_u32_e64 v4, s[6:7], v0, v10, s[6:7]
4997 ; GFX8-NEXT: v_addc_u32_e64 v6, s[6:7], v2, v10, s[6:7]
/external/llvm-project/llvm/docs/AMDGPU/
DAMDGPUAsmGFX7.rst788 …v_addc_u32_e64 :ref:`vdst<amdgpu_synid7_vdst32_0>`, :ref:`sdst<amdgpu_synid7_…

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