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Searched refs:vacgt (Results 1 – 25 of 39) sorted by relevance

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/external/capstone/suite/MC/ARM/
Dneon-cmp-encoding.s.cs40 0xb1,0x0e,0x60,0xf3 = vacgt.f32 d16, d16, d17
41 0xf2,0x0e,0x60,0xf3 = vacgt.f32 q8, q8, q9
81 0xf6,0x2e,0x68,0xf3 = vacgt.f32 q9, q12, q11
82 0x1b,0x9e,0x2c,0xf3 = vacgt.f32 d9, d12, d11
83 0xf6,0x6e,0x68,0xf3 = vacgt.f32 q11, q12, q11
84 0x1b,0xbe,0x2c,0xf3 = vacgt.f32 d11, d12, d11
Dneon-bitwise-encoding.s.cs125 0x3e,0x5e,0x25,0xf3 = vacgt.f32 d5, d5, d30
126 0x56,0xae,0x2a,0xf3 = vacgt.f32 q5, q5, q3
/external/llvm-project/llvm/test/MC/ARM/
Dneon-cmp-encoding.s69 vacgt.f32 d16, d16, d17
70 vacgt.f32 q8, q8, q9
86 @ CHECK: vacgt.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x60,0xf3]
87 @ CHECK: vacgt.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x60,0xf3]
190 @ CHECK: vacgt.f32 q9, q12, q11 @ encoding: [0xf6,0x2e,0x68,0xf3]
191 @ CHECK: vacgt.f32 d9, d12, d11 @ encoding: [0x1b,0x9e,0x2c,0xf3]
192 @ CHECK: vacgt.f32 q11, q12, q11 @ encoding: [0xf6,0x6e,0x68,0xf3]
193 @ CHECK: vacgt.f32 d11, d12, d11 @ encoding: [0x1b,0xbe,0x2c,0xf3]
Dfullfp16-neon.s151 vacgt.f16 d0, d1, d2
152 vacgt.f16 q0, q1, q2
153 @ ARM: vacgt.f16 d0, d1, d2 @ encoding: [0x12,0x0e,0x31,0xf3]
154 @ ARM: vacgt.f16 q0, q1, q2 @ encoding: [0x54,0x0e,0x32,0xf3]
155 @ THUMB: vacgt.f16 d0, d1, d2 @ encoding: [0x31,0xff,0x12,0x0e]
156 @ THUMB: vacgt.f16 q0, q1, q2 @ encoding: [0x32,0xff,0x54,0x0e]
167 @ ARM: vacgt.f16 d0, d2, d1 @ encoding: [0x11,0x0e,0x32,0xf3]
168 @ ARM: vacgt.f16 q0, q2, q1 @ encoding: [0x52,0x0e,0x34,0xf3]
169 @ THUMB: vacgt.f16 d0, d2, d1 @ encoding: [0x32,0xff,0x11,0x0e]
170 @ THUMB: vacgt.f16 q0, q2, q1 @ encoding: [0x34,0xff,0x52,0x0e]
Dneon-bitwise-encoding.s338 vacgt.f32 d5, d30
339 vacgt.f32 q5, q3
Dfullfp16-neon-neg.s111 vacgt.f16 d0, d1, d2
112 vacgt.f16 q0, q1, q2
/external/llvm/test/MC/ARM/
Dneon-cmp-encoding.s69 vacgt.f32 d16, d16, d17
70 vacgt.f32 q8, q8, q9
86 @ CHECK: vacgt.f32 d16, d16, d17 @ encoding: [0xb1,0x0e,0x60,0xf3]
87 @ CHECK: vacgt.f32 q8, q8, q9 @ encoding: [0xf2,0x0e,0x60,0xf3]
190 @ CHECK: vacgt.f32 q9, q12, q11 @ encoding: [0xf6,0x2e,0x68,0xf3]
191 @ CHECK: vacgt.f32 d9, d12, d11 @ encoding: [0x1b,0x9e,0x2c,0xf3]
192 @ CHECK: vacgt.f32 q11, q12, q11 @ encoding: [0xf6,0x6e,0x68,0xf3]
193 @ CHECK: vacgt.f32 d11, d12, d11 @ encoding: [0x1b,0xbe,0x2c,0xf3]
Dfullfp16-neon.s151 vacgt.f16 d0, d1, d2
152 vacgt.f16 q0, q1, q2
153 @ ARM: vacgt.f16 d0, d1, d2 @ encoding: [0x12,0x0e,0x31,0xf3]
154 @ ARM: vacgt.f16 q0, q1, q2 @ encoding: [0x54,0x0e,0x32,0xf3]
155 @ THUMB: vacgt.f16 d0, d1, d2 @ encoding: [0x31,0xff,0x12,0x0e]
156 @ THUMB: vacgt.f16 q0, q1, q2 @ encoding: [0x32,0xff,0x54,0x0e]
167 @ ARM: vacgt.f16 d0, d2, d1 @ encoding: [0x11,0x0e,0x32,0xf3]
168 @ ARM: vacgt.f16 q0, q2, q1 @ encoding: [0x52,0x0e,0x34,0xf3]
169 @ THUMB: vacgt.f16 d0, d2, d1 @ encoding: [0x32,0xff,0x11,0x0e]
170 @ THUMB: vacgt.f16 q0, q2, q1 @ encoding: [0x34,0xff,0x52,0x0e]
Dfullfp16-neon-neg.s111 vacgt.f16 d0, d1, d2
112 vacgt.f16 q0, q1, q2
Dneon-bitwise-encoding.s331 vacgt.f32 d5, d30
332 vacgt.f32 q5, q3
/external/llvm/test/CodeGen/ARM/
Dvcgt.ll146 ;CHECK: vacgt.f32
149 %tmp3 = call <2 x i32> @llvm.arm.neon.vacgt.v2i32.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
155 ;CHECK: vacgt.f32
158 %tmp3 = call <4 x i32> @llvm.arm.neon.vacgt.v4i32.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
175 declare <2 x i32> @llvm.arm.neon.vacgt.v2i32.v2f32(<2 x float>, <2 x float>) nounwind readnone
176 declare <4 x i32> @llvm.arm.neon.vacgt.v4i32.v4f32(<4 x float>, <4 x float>) nounwind readnone
/external/llvm-project/llvm/test/CodeGen/ARM/
Dvcgt.ll346 ; ALLOC-NEXT: vacgt.f32 d16, d17, d16
354 ; BASIC-NEXT: vacgt.f32 d16, d16, d17
359 %tmp3 = call <2 x i32> @llvm.arm.neon.vacgt.v2i32.v2f32(<2 x float> %tmp1, <2 x float> %tmp2)
368 ; ALLOC-NEXT: vacgt.f32 q8, q9, q8
377 ; BASIC-NEXT: vacgt.f32 q8, q8, q9
383 %tmp3 = call <4 x i32> @llvm.arm.neon.vacgt.v4i32.v4f32(<4 x float> %tmp1, <4 x float> %tmp2)
417 declare <2 x i32> @llvm.arm.neon.vacgt.v2i32.v2f32(<2 x float>, <2 x float>) nounwind readnone
418 declare <4 x i32> @llvm.arm.neon.vacgt.v4i32.v4f32(<4 x float>, <4 x float>) nounwind readnone
Darmv8.2a-fp16-vector-intrinsics.ll549 ; CHECK: vacgt.f16 d0, d0, d1
552 %vcagt_v2.i = tail call <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half> %a, <4 x half> %b)
558 ; CHECK: vacgt.f16 q0, q0, q1
561 %vcagtq_v2.i = tail call <8 x i16> @llvm.arm.neon.vacgt.v8i16.v8f16(<8 x half> %a, <8 x half> %b)
1301 declare <4 x i16> @llvm.arm.neon.vacgt.v4i16.v4f16(<4 x half>, <4 x half>)
1302 declare <8 x i16> @llvm.arm.neon.vacgt.v8i16.v8f16(<8 x half>, <8 x half>)
/external/llvm/test/MC/Disassembler/ARM/
Dfullfp16-neon-arm.txt99 # CHECK: vacgt.f16 d0, d1, d2
100 # CHECK: vacgt.f16 q0, q1, q2
Dfullfp16-neon-thumb.txt99 # CHECK: vacgt.f16 d0, d1, d2
100 # CHECK: vacgt.f16 q0, q1, q2
Dneon.txt396 # CHECK: vacgt.f32 d16, d16, d17
397 # CHECK: vacgt.f32 q8, q8, q9
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dfullfp16-neon-thumb.txt99 # CHECK: vacgt.f16 d0, d1, d2
100 # CHECK: vacgt.f16 q0, q1, q2
Dfullfp16-neon-arm.txt99 # CHECK: vacgt.f16 d0, d1, d2
100 # CHECK: vacgt.f16 q0, q1, q2
Dneon.txt405 # CHECK: vacgt.f32 d16, d16, d17
406 # CHECK: vacgt.f32 q8, q8, q9
/external/llvm-project/llvm/test/tools/llvm-mca/ARM/
Dcortex-a57-neon-instructions.s196 vacgt.f32 d16, d16, d17
197 vacgt.f32 q8, q8, q9
1312 # CHECK-NEXT: 1 5 0.50 vacgt.f32 d16, d16, d17
1313 # CHECK-NEXT: 1 5 0.50 vacgt.f32 q8, q8, q9
2435 # CHECK-NEXT: - - - - - - 0.50 0.50 vacgt.f32 d16, d16, d17
2436 # CHECK-NEXT: - - - - - - 0.50 0.50 vacgt.f32 q8, q8, q9
/external/vixl/src/aarch32/
Dassembler-aarch32.h3846 void vacgt(
3848 void vacgt(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacgt() function
3849 vacgt(al, dt, rd, rn, rm); in vacgt()
3852 void vacgt(
3854 void vacgt(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vacgt() function
3855 vacgt(al, dt, rd, rn, rm); in vacgt()
Ddisasm-aarch32.h1478 void vacgt(
1481 void vacgt(
/external/llvm-project/clang/include/clang/Basic/
Darm_neon.td362 let InstName = "vacgt" in {
1656 let InstName = "vacgt" in {
/external/clang/include/clang/Basic/
Darm_neon.td562 let InstName = "vacgt" in {
/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/
DARMGenAsmMatcher.inc9919 "bav\004vabd\005vabdl\004vabs\005vacge\005vacgt\005vacle\005vaclt\004vad"
11673 …{ 1999 /* vacgt */, ARM::VACGTfq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { M…
11674 …{ 1999 /* vacgt */, ARM::VACGTfd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { M…
11675 …{ 1999 /* vacgt */, ARM::VACGThq, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON_HasF…
11676 …{ 1999 /* vacgt */, ARM::VACGThd, Convert__Reg1_2__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON_HasF…
11677 …{ 1999 /* vacgt */, ARM::VACGTfq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { M…
11678 …{ 1999 /* vacgt */, ARM::VACGTfd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON, { M…
11679 …{ 1999 /* vacgt */, ARM::VACGThq, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON_HasF…
11680 …{ 1999 /* vacgt */, ARM::VACGThd, Convert__Reg1_2__Reg1_3__Reg1_4__CondCode2_0, AMFBS_HasNEON_HasF…

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