/external/llvm-project/llvm/test/MC/ARM/ |
D | neon-cmp-encoding.s | 185 vacle.f32 q9, q11, q12 186 vacle.f32 d9, d11, d12 187 vacle.f32 q11, q12 188 vacle.f32 d11, d12
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D | fullfp16-neon-neg.s | 116 vacle.f16 d0, d1, d2 117 vacle.f16 q0, q1, q2
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D | fullfp16-neon.s | 158 vacle.f16 d0, d1, d2 159 vacle.f16 q0, q1, q2
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/external/llvm/test/MC/ARM/ |
D | neon-cmp-encoding.s | 185 vacle.f32 q9, q11, q12 186 vacle.f32 d9, d11, d12 187 vacle.f32 q11, q12 188 vacle.f32 d11, d12
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D | fullfp16-neon-neg.s | 116 vacle.f16 d0, d1, d2 117 vacle.f16 q0, q1, q2
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D | fullfp16-neon.s | 158 vacle.f16 d0, d1, d2 159 vacle.f16 q0, q1, q2
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 3858 void vacle( 3860 void vacle(DataType dt, DRegister rd, DRegister rn, DRegister rm) { in vacle() function 3861 vacle(al, dt, rd, rn, rm); in vacle() 3864 void vacle( 3866 void vacle(DataType dt, QRegister rd, QRegister rn, QRegister rm) { in vacle() function 3867 vacle(al, dt, rd, rn, rm); in vacle()
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D | disasm-aarch32.h | 1484 void vacle( 1487 void vacle(
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D | assembler-aarch32.cc | 14297 void Assembler::vacle( in vacle() function in vixl::aarch32::Assembler 14321 Delegate(kVacle, &Assembler::vacle, cond, dt, rd, rn, rm); in vacle() 14324 void Assembler::vacle( in vacle() function in vixl::aarch32::Assembler 14348 Delegate(kVacle, &Assembler::vacle, cond, dt, rd, rn, rm); in vacle()
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D | macro-assembler-aarch32.h | 5479 vacle(cond, dt, rd, rn, rm); in Vacle() 5494 vacle(cond, dt, rd, rn, rm); in Vacle()
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D | disasm-aarch32.cc | 3845 void Disassembler::vacle( in vacle() function in vixl::aarch32::Disassembler 3856 void Disassembler::vacle( in vacle() function in vixl::aarch32::Disassembler
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/external/llvm/lib/Target/ARM/ |
D | ARMInstrNEON.td | 4805 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vn, $Vm", 4807 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vn, $Vm", 4814 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vn, $Vm", 4816 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vn, $Vm", 4824 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vm", 4826 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vm", 4833 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vm", 4835 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vm",
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMInstrNEON.td | 5184 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vn, $Vm", 5186 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vn, $Vm", 5193 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vn, $Vm", 5195 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vn, $Vm", 5253 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vm", 5255 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vm", 5262 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vm", 5264 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vm",
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/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMInstrNEON.td | 5177 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vn, $Vm", 5179 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vn, $Vm", 5186 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vn, $Vm", 5188 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vn, $Vm", 5244 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vm", 5246 def: NEONInstAlias<"vacle${p}.f32 $Vd, $Vm", 5253 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vm", 5255 def: NEONInstAlias<"vacle${p}.f16 $Vd, $Vm",
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/external/capstone/arch/ARM/ |
D | ARMGenAsmWriter.inc | 9391 AsmString = "vacle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; 9402 AsmString = "vacle$\xFF\x04\x01.f32 $\x01, $\x02"; 9415 AsmString = "vacle$\xFF\x04\x01.f32 $\x01, $\x03, $\x02"; 9426 AsmString = "vacle$\xFF\x04\x01.f32 $\x01, $\x02";
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmMatcher.inc | 9919 "bav\004vabd\005vabdl\004vabs\005vacge\005vacgt\005vacle\005vaclt\004vad" 11681 …{ 2005 /* vacle */, ARM::VACGEfq, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, AMFBS_HasNEON, { M… 11682 …{ 2005 /* vacle */, ARM::VACGEfd, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, AMFBS_HasNEON, { M… 11683 …{ 2005 /* vacle */, ARM::VACGEhq, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, AMFBS_HasNEON_HasF… 11684 …{ 2005 /* vacle */, ARM::VACGEhd, Convert__Reg1_2__Reg1_3__Reg1_2__CondCode2_0, AMFBS_HasNEON_HasF… 11685 …{ 2005 /* vacle */, ARM::VACGEfq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, AMFBS_HasNEON, { M… 11686 …{ 2005 /* vacle */, ARM::VACGEfd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, AMFBS_HasNEON, { M… 11687 …{ 2005 /* vacle */, ARM::VACGEhq, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, AMFBS_HasNEON_HasF… 11688 …{ 2005 /* vacle */, ARM::VACGEhd, Convert__Reg1_2__Reg1_4__Reg1_3__CondCode2_0, AMFBS_HasNEON_HasF…
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