Home
last modified time | relevance | path

Searched refs:vcvtb (Results 1 – 25 of 60) sorted by relevance

123

/external/llvm/test/CodeGen/ARM/
Dfp16-promote.ll9 ; CHECK-FP16: vcvtb.f32.f16
10 ; CHECK-FP16: vcvtb.f32.f16
15 ; CHECK-FP16: vcvtb.f16.f32
26 ; CHECK-FP16: vcvtb.f32.f16
27 ; CHECK-FP16: vcvtb.f32.f16
32 ; CHECK-FP16: vcvtb.f16.f32
43 ; CHECK-FP16: vcvtb.f32.f16
44 ; CHECK-FP16: vcvtb.f32.f16
49 ; CHECK-FP16: vcvtb.f16.f32
60 ; CHECK-FP16: vcvtb.f32.f16
[all …]
Dfp16-v3.ll7 ; CHECK-DAG: vcvtb.f32.f16 [[SREG1:s[0-9]+]],
9 ; CHECK-DAG: vcvtb.f16.f32 [[SREG3:s[0-9]+]], [[SREG2]]
10 ; CHECK-DAG: vcvtb.f32.f16 [[SREG4:s[0-9]+]], [[SREG3]]
12 ; CHECK-NEXT: vcvtb.f16.f32 [[SREG6:s[0-9]+]], [[SREG5]]
31 ; CHECK: vcvtb.f16.f32
32 ; CHECK: vcvtb.f16.f32
33 ; CHECK: vcvtb.f16.f32
Dfp16-args.ll24 ; SOFT: vcvtb.f32.f16 {{s[0-9]+}}, {{s[0-9]+}}
25 ; SOFT: vcvtb.f32.f16 {{s[0-9]+}}, {{s[0-9]+}}
27 ; SOFT: vcvtb.f16.f32 {{s[0-9]+}}, {{s[0-9]+}}
32 ; HARD: vcvtb.f32.f16 {{s[0-9]+}}, s1
33 ; HARD: vcvtb.f32.f16 {{s[0-9]+}}, s0
35 ; HARD: vcvtb.f16.f32 [[SREG:s[0-9]+]], {{s[0-9]+}}
Dhalf.ll34 ; CHECK-F16: vcvtb.f32.f16
35 ; CHECK-V8: vcvtb.f32.f16
46 ; CHECK-F16: vcvtb.f32.f16
48 ; CHECK-V8: vcvtb.f64.f16
58 ; CHECK-F16: vcvtb.f16.f32
59 ; CHECK-V8: vcvtb.f16.f32
70 ; CHECK-V8: vcvtb.f16.f64
Dfp16.ll31 ; CHECK-FP16: vcvtb.f32.f16
32 ; CHECK-ARMv8: vcvtb.f32.f16
38 ; CHECK-FP16: vcvtb.f32.f16
39 ; CHECK-ARMV8: vcvtb.f32.f16
46 ; CHECK-FP16: vcvtb.f16.f32
47 ; CHECK-ARMV8: vcvtb.f16.f32
66 ; CHECK-FP16: vcvtb.f32.f16 [[TMP32:s[0-9]+]], [[TMP16]]
70 ; CHECK-ARMV8: vcvtb.f64.f16 d0, [[TMP]]
90 ; CHECK-FP16-UNSAFE-NEXT: vcvtb.f16.f32 s0, s0
92 ; CHECK-ARMV8: vcvtb.f16.f64 [[TMP:s[0-9]+]], d0
/external/llvm-project/llvm/test/CodeGen/ARM/
Dfp16-args.ll16 ; SOFT-NEXT: vcvtb.f32.f16 s0, s0
17 ; SOFT-NEXT: vcvtb.f32.f16 s2, s2
19 ; SOFT-NEXT: vcvtb.f16.f32 s0, s0
25 ; HARD-NEXT: vcvtb.f32.f16 s2, s1
26 ; HARD-NEXT: vcvtb.f32.f16 s0, s0
28 ; HARD-NEXT: vcvtb.f16.f32 s0, s0
53 ; SOFT-NEXT: vcvtb.f32.f16 s0, s0
55 ; SOFT-NEXT: vcvtb.f32.f16 s2, s2
57 ; SOFT-NEXT: vcvtb.f32.f16 s4, s4
58 ; SOFT-NEXT: vcvtb.f32.f16 s6, s6
[all …]
Dfp16-promote.ll9 ; CHECK-FP16: vcvtb.f32.f16
10 ; CHECK-FP16: vcvtb.f32.f16
15 ; CHECK-FP16: vcvtb.f16.f32
26 ; CHECK-FP16: vcvtb.f32.f16
27 ; CHECK-FP16: vcvtb.f32.f16
32 ; CHECK-FP16: vcvtb.f16.f32
43 ; CHECK-FP16: vcvtb.f32.f16
44 ; CHECK-FP16: vcvtb.f32.f16
49 ; CHECK-FP16: vcvtb.f16.f32
60 ; CHECK-FP16: vcvtb.f32.f16
[all …]
Dhalf.ll40 ; CHECK-F16: vcvtb.f32.f16
41 ; CHECK-V8: vcvtb.f32.f16
42 ; CHECK-V8-SP: vcvtb.f32.f16
53 ; CHECK-F16: vcvtb.f32.f16
55 ; CHECK-V8: vcvtb.f64.f16
56 ; CHECK-V8-SP: vcvtb.f32.f16
67 ; CHECK-F16: vcvtb.f16.f32
68 ; CHECK-V8: vcvtb.f16.f32
69 ; CHECK-V8-SP: vcvtb.f16.f32
80 ; CHECK-V8: vcvtb.f16.f64
Dfp16.ll31 ; CHECK-FP16: vcvtb.f32.f16
32 ; CHECK-ARMV8: vcvtb.f32.f16
38 ; CHECK-FP16: vcvtb.f32.f16
39 ; CHECK-ARMV8: vcvtb.f32.f16
46 ; CHECK-FP16: vcvtb.f16.f32
47 ; CHECK-ARMV8: vcvtb.f16.f32
66 ; CHECK-FP16: vcvtb.f32.f16 [[TMP32:s[0-9]+]], [[TMP16]]
70 ; CHECK-ARMV8: vcvtb.f64.f16 d0, [[TMP]]
90 ; CHECK-FP16-UNSAFE-NEXT: vcvtb.f16.f32 s0, s0
92 ; CHECK-ARMV8: vcvtb.f16.f64 [[TMP:s[0-9]+]], d0
Dfp16-fullfp16.ll67 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
68 ; CHECK-NEXT: vcvtb.f32.f16 s1, s2
70 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
164 ; CHECK: vcvtb.f16.f32 s0, s0
174 ; CHECK: vcvtb.f16.f64 s0, d0
185 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
195 ; CHECK-NEXT: vcvtb.f64.f16 d0, s0
239 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
241 ; CHECK-NEXT: vcvtb.f16.f32 s0, s0
256 ; CHECK-NEXT: vcvtb.f32.f16 s0, s0
[all …]
Dfp16-bitcast.ll45 ; CHECK-VFPV4-SOFT-NEXT: vcvtb.f32.f16 s0, s0
46 ; CHECK-VFPV4-SOFT-NEXT: vcvtb.f32.f16 s2, s2
48 ; CHECK-VFPV4-SOFT-NEXT: vcvtb.f16.f32 s0, s0
62 ; CHECK-VFPV4-HARD-NEXT: vcvtb.f32.f16 s2, s1
63 ; CHECK-VFPV4-HARD-NEXT: vcvtb.f32.f16 s0, s0
65 ; CHECK-VFPV4-HARD-NEXT: vcvtb.f16.f32 s0, s0
83 ; CHECK-VFPV4-SOFT-NEXT: vcvtb.f32.f16 s2, s2
85 ; CHECK-VFPV4-SOFT-NEXT: vcvtb.f16.f32 s0, s0
102 ; CHECK-VFPV4-HARD-NEXT: vcvtb.f32.f16 s2, s2
104 ; CHECK-VFPV4-HARD-NEXT: vcvtb.f16.f32 s0, s0
Dfp16-v3.ll9 ; CHECK-DAG: vcvtb.f16.f32 [[SREG3:s[0-9]+]], [[SREG2]]
10 ; CHECK-DAG: vcvtb.f32.f16 [[SREG4:s[0-9]+]], [[SREG3]]
12 ; CHECK-NEXT: vcvtb.f16.f32 [[SREG6:s[0-9]+]], [[SREG5]]
Dfp16-instructions.ll77 ; CHECK-SOFTFP-FP16-DAG: vcvtb.f32.f16 [[S0]], [[S0]]
78 ; CHECK-SOFTFP-FP16-DAG: vcvtb.f32.f16 [[S2]], [[S2]]
80 ; CHECK-SOFTFP-FP16: vcvtb.f16.f32 [[S0]], [[S0]]
96 ; CHECK-HARDFP-FP16: vcvtb.f32.f16 [[S2:s[0-9]]], s1
97 ; CHECK-HARDFP-FP16: vcvtb.f32.f16 [[S0:s[0-9]]], s0
99 ; CHECK-HARDFP-FP16: vcvtb.f16.f32 [[S0]], [[S0]]
124 ; CHECK-SOFTFP-FP16: vcvtb.f32.f16 s{{.}}, s{{.}}
125 ; CHECK-SOFTFP-FP16: vcvtb.f32.f16 s{{.}}, s{{.}}
214 ; CHECK-SOFTFP-FP16: vcvtb.f32.f16 [[S2:s[0-9]]], [[S2]]
287 ; CHECK-HARDFP-FULLFP16: vcvtb.f16.f32 s0, s0
[all …]
Dfp16-insert-extract.ll26 ; CHECKHARD-NEXT: vcvtb.f32.f16 s0, s1
32 ; CHECKSOFT-NEXT: vcvtb.f32.f16 s0, s1
44 ; CHECKHARD-NEXT: vcvtb.f32.f16 s0, s3
50 ; CHECKSOFT-NEXT: vcvtb.f32.f16 s0, s3
/external/llvm-project/llvm/test/CodeGen/Thumb2/
Dmve-vcvt16.ll8 ; CHECK-NEXT: vcvtb.f32.f16 s6, s1
10 ; CHECK-NEXT: vcvtb.f32.f16 s4, s0
23 ; CHECK-NEXT: vcvtb.f32.f16 s10, s1
24 ; CHECK-NEXT: vcvtb.f32.f16 s6, s3
27 ; CHECK-NEXT: vcvtb.f32.f16 s8, s0
28 ; CHECK-NEXT: vcvtb.f32.f16 s4, s2
40 ; CHECK-NEXT: vcvtb.f16.f32 s4, s0
42 ; CHECK-NEXT: vcvtb.f16.f32 s5, s2
55 ; CHECK-NEXT: vcvtb.f16.f32 s0, s8
57 ; CHECK-NEXT: vcvtb.f16.f32 s1, s10
[all …]
Dmve-fmath.ll120 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
129 ; CHECK-NEXT: vcvtb.f16.f32 s20, s20
131 ; CHECK-NEXT: vcvtb.f32.f16 s0, s17
135 ; CHECK-NEXT: vcvtb.f16.f32 s21, s0
141 ; CHECK-NEXT: vcvtb.f32.f16 s0, s18
145 ; CHECK-NEXT: vcvtb.f16.f32 s22, s0
151 ; CHECK-NEXT: vcvtb.f32.f16 s0, s19
155 ; CHECK-NEXT: vcvtb.f16.f32 s23, s0
232 ; CHECK-NEXT: vcvtb.f32.f16 s0, s16
241 ; CHECK-NEXT: vcvtb.f16.f32 s20, s20
[all …]
Dmve-fp16convertloops.ll17 ; CHECK-NEXT: vcvtb.f16.f32 q1, q1
63 ; CHECK-NEXT: vcvtb.f16.f32 q1, q1
67 ; CHECK-NEXT: vcvtb.f16.f32 q1, q1
113 ; CHECK-NEXT: vcvtb.f16.f32 q1, q1
117 ; CHECK-NEXT: vcvtb.f16.f32 q1, q1
121 ; CHECK-NEXT: vcvtb.f16.f32 q1, q1
125 ; CHECK-NEXT: vcvtb.f16.f32 q1, q1
170 ; CHECK-NEXT: vcvtb.f32.f16 q1, q1
216 ; CHECK-NEXT: vcvtb.f32.f16 q1, q1
220 ; CHECK-NEXT: vcvtb.f32.f16 q1, q1
[all …]
/external/llvm-project/llvm/test/MC/ARM/
Dneon-vcvt-fp16.s13 @ CHECK-FP16: vcvtb.f32.f16 s7, s1 @ encoding: [0x60,0x3a,0xf2,0xee]
15 vcvtb.f32.f16 s7, s1
16 @ CHECK-FP16: vcvtb.f16.f32 s1, s7 @ encoding: [0x63,0x0a,0xf3,0xee]
18 vcvtb.f16.f32 s1, s7
Dthumb-fp-armv8.s10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
Dfp-armv8.s10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0x60,0x3b,0xb2,0xee]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xee]
Dfp-armv8-m.s13 vcvtb.f64.f16 d3, s1
14 @ CHECK-V81M: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
15 vcvtb.f16.f64 s4, d1
16 @ CHECK-V81M: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
/external/llvm/test/MC/ARM/
Dneon-vcvt-fp16.s13 @ CHECK-FP16: vcvtb.f32.f16 s7, s1 @ encoding: [0x60,0x3a,0xf2,0xee]
15 vcvtb.f32.f16 s7, s1
16 @ CHECK-FP16: vcvtb.f16.f32 s1, s7 @ encoding: [0x63,0x0a,0xf3,0xee]
18 vcvtb.f16.f32 s1, s7
Dfp-armv8.s10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0x60,0x3b,0xb2,0xee]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0x41,0x2b,0xb3,0xee]
Dthumb-fp-armv8.s10 vcvtb.f64.f16 d3, s1
11 @ CHECK: vcvtb.f64.f16 d3, s1 @ encoding: [0xb2,0xee,0x60,0x3b]
12 vcvtb.f16.f64 s4, d1
13 @ CHECK: vcvtb.f16.f64 s4, d1 @ encoding: [0xb3,0xee,0x41,0x2b]
/external/capstone/suite/MC/ARM/
Dfp-armv8.s.cs4 0x60,0x3b,0xb2,0xee = vcvtb.f64.f16 d3, s1
5 0x41,0x2b,0xb3,0xee = vcvtb.f16.f64 s4, d1

123