/external/arm-optimized-routines/string/aarch64/ |
D | strchrnul.S | 28 #define vdata1 v1 macro 65 ld1 {vdata1.16b, vdata2.16b}, [src], #32 67 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 69 cmhs vhas_nul1.16b, vhas_chr1.16b, vdata1.16b 85 ld1 {vdata1.16b, vdata2.16b}, [src], #32 86 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 88 cmhs vhas_nul1.16b, vhas_chr1.16b, vdata1.16b
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D | strrchr.S | 34 #define vdata1 v1 macro 76 ld1 {vdata1.16b, vdata2.16b}, [src], #32 78 cmeq vhas_nul1.16b, vdata1.16b, #0 79 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 105 ld1 {vdata1.16b, vdata2.16b}, [src], #32 106 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 108 uminp vend1.16b, vdata1.16b, vdata2.16b 118 cmeq vhas_nul1.16b, vdata1.16b, #0
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D | strchr.S | 28 #define vdata1 v1 macro 71 ld1 {vdata1.16b, vdata2.16b}, [src], #32 73 cmeq vhas_nul1.16b, vdata1.16b, #0 74 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 93 ld1 {vdata1.16b, vdata2.16b}, [src], #32 94 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 96 cmhs vhas_nul1.16b, vhas_chr1.16b, vdata1.16b
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D | memchr.S | 31 #define vdata1 v1 macro 74 ld1 {vdata1.16b, vdata2.16b}, [src], #32 77 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 94 ld1 {vdata1.16b, vdata2.16b}, [src], #32 96 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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/external/llvm-project/libc/AOR_v20.02/string/aarch64/ |
D | strchrnul.S | 29 #define vdata1 v1 macro 65 ld1 {vdata1.16b, vdata2.16b}, [src], #32 67 cmeq vhas_nul1.16b, vdata1.16b, #0 68 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 86 ld1 {vdata1.16b, vdata2.16b}, [src], #32 87 cmeq vhas_nul1.16b, vdata1.16b, #0 88 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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D | strchr.S | 29 #define vdata1 v1 macro 71 ld1 {vdata1.16b, vdata2.16b}, [src], #32 73 cmeq vhas_nul1.16b, vdata1.16b, #0 74 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 94 ld1 {vdata1.16b, vdata2.16b}, [src], #32 95 cmeq vhas_nul1.16b, vdata1.16b, #0 96 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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D | strrchr.S | 35 #define vdata1 v1 macro 76 ld1 {vdata1.16b, vdata2.16b}, [src], #32 78 cmeq vhas_nul1.16b, vdata1.16b, #0 79 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 105 ld1 {vdata1.16b, vdata2.16b}, [src], #32 106 cmeq vhas_nul1.16b, vdata1.16b, #0 107 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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D | memchr.S | 32 #define vdata1 v1 macro 73 ld1 {vdata1.16b, vdata2.16b}, [src], #32 76 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b 93 ld1 {vdata1.16b, vdata2.16b}, [src], #32 95 cmeq vhas_chr1.16b, vdata1.16b, vrepchr.16b
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/external/llvm-project/llvm/docs/AMDGPU/ |
D | AMDGPUAsmGFX7.rst | 54 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata32_0>`, :ref:`vdata1<amdgpu_synid7_vdat… 55 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata64_0>`, :ref:`vdata1<amdgpu_synid7_vdat… 56 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata32_0>`, :ref:`vdata1<amdgpu_synid7_vdat… 57 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata64_0>`, :ref:`vdata1<amdgpu_synid7_vdat… 58 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata32_0>`, :ref:`vdata1<amdgpu_synid7_vdat… 59 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata64_0>`, :ref:`vdata1<amdgpu_synid7_vdat… 60 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata32_0>`, :ref:`vdata1<amdgpu_synid7_vdat… 61 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata64_0>`, :ref:`vdata1<amdgpu_synid7_vdat… 118 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata32_0>`, :ref:`vdata1<amdgpu_synid7_vdat… 119 …gpu_synid7_addr_ds>`, :ref:`vdata0<amdgpu_synid7_vdata64_0>`, :ref:`vdata1<amdgpu_synid7_vdat… [all …]
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D | AMDGPUAsmGFX8.rst | 58 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata32_0>`, :ref:`vdata1<amdgpu_synid8_vdat… 59 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata64_0>`, :ref:`vdata1<amdgpu_synid8_vdat… 60 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata32_0>`, :ref:`vdata1<amdgpu_synid8_vdat… 61 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata64_0>`, :ref:`vdata1<amdgpu_synid8_vdat… 62 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata32_0>`, :ref:`vdata1<amdgpu_synid8_vdat… 63 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata64_0>`, :ref:`vdata1<amdgpu_synid8_vdat… 64 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata32_0>`, :ref:`vdata1<amdgpu_synid8_vdat… 65 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata64_0>`, :ref:`vdata1<amdgpu_synid8_vdat… 122 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata32_0>`, :ref:`vdata1<amdgpu_synid8_vdat… 123 …gpu_synid8_addr_ds>`, :ref:`vdata0<amdgpu_synid8_vdata64_0>`, :ref:`vdata1<amdgpu_synid8_vdat… [all …]
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D | AMDGPUAsmGFX9.rst | 58 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata32_0>`, :ref:`vdata1<amdgpu_synid9_vdat… 59 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata64_0>`, :ref:`vdata1<amdgpu_synid9_vdat… 60 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata32_0>`, :ref:`vdata1<amdgpu_synid9_vdat… 61 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata64_0>`, :ref:`vdata1<amdgpu_synid9_vdat… 62 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata32_0>`, :ref:`vdata1<amdgpu_synid9_vdat… 63 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata64_0>`, :ref:`vdata1<amdgpu_synid9_vdat… 64 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata32_0>`, :ref:`vdata1<amdgpu_synid9_vdat… 65 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata64_0>`, :ref:`vdata1<amdgpu_synid9_vdat… 122 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata32_0>`, :ref:`vdata1<amdgpu_synid9_vdat… 123 …gpu_synid9_addr_ds>`, :ref:`vdata0<amdgpu_synid9_vdata64_0>`, :ref:`vdata1<amdgpu_synid9_vdat… [all …]
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D | AMDGPUAsmGFX10.rst | 270 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vda… 271 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vda… 272 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vda… 273 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vda… 274 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vda… 275 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vda… 276 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vda… 277 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vda… 334 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata32_0>`, :ref:`vdata1<amdgpu_synid10_vda… 335 …u_synid10_addr_ds>`, :ref:`vdata0<amdgpu_synid10_vdata64_0>`, :ref:`vdata1<amdgpu_synid10_vda… [all …]
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/external/llvm-project/mlir/test/Target/ |
D | rocdl.mlir | 157 %slc : !llvm.i1, %vdata1 : !llvm.vec<1 x float>, 168 rocdl.buffer.store %vdata1, %rsrc, %vindex, %offset, %glc, %slc : !llvm.vec<1 x float>
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/external/llvm-project/mlir/test/Dialect/LLVMIR/ |
D | rocdl.mlir | 150 %slc : !llvm.i1, %vdata1 : !llvm.vec<1 x float>, 161 rocdl.buffer.store %vdata1, %rsrc, %vindex, %offset, %glc, %slc : !llvm.vec<1 x float>
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