/external/XNNPACK/src/f32-dwconv2d-chw/gen/ |
D | 5x5p2-minmax-neonfma-1x4-acc3.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3() 186 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3() local 192 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3() 245 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3() 264 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3() 265 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc3()
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D | 5x5p2-minmax-neon-1x4.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4() 184 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4() local 190 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4() 243 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4() 262 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4() 263 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4()
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D | 5x5p2-minmax-neonfma-1x4-acc2.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2() 185 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2() local 191 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2() 244 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2() 263 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2() 264 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc2()
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D | 5x5p2-minmax-neon-1x4-acc2.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2() 185 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2() local 191 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2() 244 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2() 263 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2() 264 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc2()
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D | 5x5p2-minmax-neon-1x4-acc3.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3() 186 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3() local 192 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3() 245 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3() 264 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3() 265 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc3()
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D | 5x5p2-minmax-neonfma-1x4.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4() 184 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4() local 190 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4() 243 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4() 262 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4() 263 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4()
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D | 5x5p2-minmax-wasmsimd-arm-splat-1x4-acc4.c | 86 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4() local 139 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4() 158 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4() 159 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4() 189 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4() local 195 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4() 248 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4() 267 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4() 268 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc4()
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D | 5x5p2-minmax-wasmsimd-x86-splat-1x4.c | 86 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4() local 139 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4() 158 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4() 159 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4() 186 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4() local 192 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4() 245 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4() 264 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4() 265 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4()
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D | 5x5p2-minmax-wasmsimd-arm-splat-1x4-acc3.c | 86 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3() local 139 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3() 158 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3() 159 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3() 188 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3() local 194 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3() 247 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3() 266 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3() 267 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc3()
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D | 5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc3.c | 112 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3() local 165 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3() 184 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3() 185 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3() 214 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3() local 220 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3() 273 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3() 292 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3() 293 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc3()
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D | 5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc2.c | 112 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2() local 165 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2() 184 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2() 185 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2() 213 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2() local 219 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2() 272 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2() 291 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2() 292 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc2()
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D | 5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc4.c | 112 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4() local 165 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4() 184 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4() 185 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4() 215 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4() local 221 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4() 274 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4() 293 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4() 294 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc4()
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D | 5x5p2-minmax-wasmsimd-arm-loadsplat-1x4.c | 112 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4() local 165 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4() 184 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4() 185 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4() 212 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4() local 218 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4() 271 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4() 290 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4() 291 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4()
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D | 5x5p2-minmax-wasmsimd-x86-splat-1x4-acc2.c | 86 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2() local 139 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2() 158 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2() 159 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2() 187 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2() local 193 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2() 246 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2() 265 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2() 266 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_splat_1x4_acc2()
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D | 5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc2.c | 112 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2() local 165 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2() 184 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2() 185 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2() 213 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2() local 219 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2() 272 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2() 291 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2() 292 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc2()
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D | 5x5p2-minmax-neonfma-1x4-acc5.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5() 188 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5() local 194 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5() 247 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5() 266 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5() 267 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc5()
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D | 5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc3.c | 112 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3() local 165 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3() 184 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3() 185 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3() 214 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3() local 220 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3() 273 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3() 292 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3() 293 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc3()
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D | 5x5p2-minmax-neonfma-1x4-acc4.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4() 187 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4() local 193 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4() 246 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4() 265 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4() 266 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neonfma_1x4_acc4()
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D | 5x5p2-minmax-neon-1x4-acc5.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5() 188 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5() local 194 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5() 247 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5() 266 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5() 267 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc5()
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D | 5x5p2-minmax-wasmsimd-x86-loadsplat-1x4.c | 112 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4() local 165 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4() 184 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4() 185 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4() 212 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4() local 218 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4() 271 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4() 290 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4() 291 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4()
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D | 5x5p2-minmax-neon-1x4-acc4.c | 83 const float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4() local 136 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4() 155 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4() 156 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4() 187 float32x4_t vi3x89AB = vld1q_f32(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4() local 193 vi3x89AB = vreinterpretq_f32_u32(vandq_u32(vmask, vreinterpretq_u32_f32(vi3x89AB))); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4() 246 const float32x4_t vi3x5678 = vextq_f32(vi3x4567, vi3x89AB, 1); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4() 265 const float32x4_t vi3x6789 = vextq_f32(vi3x4567, vi3x89AB, 2); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4() 266 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__neon_1x4_acc4()
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D | 5x5p2-minmax-wasmsimd-arm-splat-1x4-acc2.c | 86 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2() local 139 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2() 158 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2() 159 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2() 187 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2() local 193 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2() 246 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2() 265 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2() 266 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4_acc2()
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D | 5x5p2-minmax-wasmsimd-x86-loadsplat-1x4-acc4.c | 112 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4() local 165 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4() 184 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4() 185 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4() 215 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4() local 221 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4() 274 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4() 293 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4() 294 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_x86_loadsplat_1x4_acc4()
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D | 5x5p2-minmax-wasmsimd-arm-loadsplat-1x4-acc5.c | 112 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5() local 165 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5() 184 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5() 185 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5() 216 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5() local 222 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5() 275 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5() 294 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5() 295 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_loadsplat_1x4_acc5()
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D | 5x5p2-minmax-wasmsimd-arm-splat-1x4.c | 86 const v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4() local 139 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4() 158 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4() 159 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4() 186 v128_t vi3x89AB = wasm_v128_load(i3); i3 += 4; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4() local 192 vi3x89AB = wasm_v128_and(vmask, vi3x89AB); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4() 245 const v128_t vi3x5678 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 1, 2, 3, 4); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4() 264 const v128_t vi3x6789 = wasm_v32x4_shuffle(vi3x4567, vi3x89AB, 2, 3, 4, 5); in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4() 265 vi3x4567 = vi3x89AB; in xnn_f32_dwconv2d_chw_ukernel_5x5p2__wasmsimd_arm_splat_1x4()
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