Home
last modified time | relevance | path

Searched refs:vld1q_lane_s16 (Results 1 – 10 of 10) sorted by relevance

/external/libjpeg-turbo/simd/arm/aarch32/
Djchuff-neon.c53 row0 = vld1q_lane_s16(block + 1, row0, 1); in jsimd_huff_encode_one_block_neon()
54 row0 = vld1q_lane_s16(block + 8, row0, 2); in jsimd_huff_encode_one_block_neon()
55 row0 = vld1q_lane_s16(block + 16, row0, 3); in jsimd_huff_encode_one_block_neon()
56 row0 = vld1q_lane_s16(block + 9, row0, 4); in jsimd_huff_encode_one_block_neon()
57 row0 = vld1q_lane_s16(block + 2, row0, 5); in jsimd_huff_encode_one_block_neon()
58 row0 = vld1q_lane_s16(block + 3, row0, 6); in jsimd_huff_encode_one_block_neon()
59 row0 = vld1q_lane_s16(block + 10, row0, 7); in jsimd_huff_encode_one_block_neon()
62 row1 = vld1q_lane_s16(block + 24, row1, 1); in jsimd_huff_encode_one_block_neon()
63 row1 = vld1q_lane_s16(block + 32, row1, 2); in jsimd_huff_encode_one_block_neon()
64 row1 = vld1q_lane_s16(block + 25, row1, 3); in jsimd_huff_encode_one_block_neon()
[all …]
/external/libjpeg-turbo/simd/arm/
Djcphuff-neon.c53 coefs1 = vld1q_lane_s16(block + jpeg_natural_order_start[1], coefs1, 1); in jsimd_encode_mcu_AC_first_prepare_neon()
54 coefs1 = vld1q_lane_s16(block + jpeg_natural_order_start[2], coefs1, 2); in jsimd_encode_mcu_AC_first_prepare_neon()
55 coefs1 = vld1q_lane_s16(block + jpeg_natural_order_start[3], coefs1, 3); in jsimd_encode_mcu_AC_first_prepare_neon()
56 coefs1 = vld1q_lane_s16(block + jpeg_natural_order_start[4], coefs1, 4); in jsimd_encode_mcu_AC_first_prepare_neon()
57 coefs1 = vld1q_lane_s16(block + jpeg_natural_order_start[5], coefs1, 5); in jsimd_encode_mcu_AC_first_prepare_neon()
58 coefs1 = vld1q_lane_s16(block + jpeg_natural_order_start[6], coefs1, 6); in jsimd_encode_mcu_AC_first_prepare_neon()
59 coefs1 = vld1q_lane_s16(block + jpeg_natural_order_start[7], coefs1, 7); in jsimd_encode_mcu_AC_first_prepare_neon()
61 coefs2 = vld1q_lane_s16(block + jpeg_natural_order_start[9], coefs2, 1); in jsimd_encode_mcu_AC_first_prepare_neon()
62 coefs2 = vld1q_lane_s16(block + jpeg_natural_order_start[10], coefs2, 2); in jsimd_encode_mcu_AC_first_prepare_neon()
63 coefs2 = vld1q_lane_s16(block + jpeg_natural_order_start[11], coefs2, 3); in jsimd_encode_mcu_AC_first_prepare_neon()
[all …]
/external/tensorflow/tensorflow/core/kernels/
Dquantized_resize_bilinear_op.cc156 int16x8_t ret = vld1q_lane_s16(v0, ZERO_16x8, 0); in ToInt16x8()
157 ret = vld1q_lane_s16(v1, ret, 1); in ToInt16x8()
158 ret = vld1q_lane_s16(v2, ret, 2); in ToInt16x8()
159 ret = vld1q_lane_s16(v3, ret, 3); in ToInt16x8()
160 ret = vld1q_lane_s16(v4, ret, 4); in ToInt16x8()
161 ret = vld1q_lane_s16(v5, ret, 5); in ToInt16x8()
162 ret = vld1q_lane_s16(v6, ret, 6); in ToInt16x8()
163 ret = vld1q_lane_s16(v7, ret, 7); in ToInt16x8()
/external/llvm-project/clang/test/Sema/
Daarch64-neon-ranges.c46 vld1q_lane_s16(addr, big, 7); in test_ld1st1()
56 …vld1q_lane_s16(addr, big, 8); // expected-error-re {{argument value {{.*}} is outside the valid ra… in test_ld1st1()
/external/clang/test/Sema/
Daarch64-neon-ranges.c46 vld1q_lane_s16(addr, big, 7); in test_ld1st1()
56 vld1q_lane_s16(addr, big, 8); // expected-error {{argument should be a value from 0 to 7}} in test_ld1st1()
/external/llvm-project/clang/test/CodeGen/
Daarch64-neon-ldst-one.c694 return vld1q_lane_s16(a, b, 7); in test_vld1q_lane_s16()
Darm_neon_intrinsics.c4339 return vld1q_lane_s16(a, b, 7); in test_vld1q_lane_s16()
/external/clang/test/CodeGen/
Daarch64-neon-ldst-one.c1870 return vld1q_lane_s16(a, b, 7); in test_vld1q_lane_s16()
Darm_neon_intrinsics.c4627 return vld1q_lane_s16(a, b, 7); in test_vld1q_lane_s16()
/external/neon_2_sse/
DNEON_2_SSE.h1255 _NEON2SSESTORAGE int16x8_t vld1q_lane_s16(__transfersize(1) int16_t const * ptr, int16x8_t vec, __c…
9354 _NEON2SSESTORAGE int16x8_t vld1q_lane_s16(__transfersize(1) int16_t const * ptr, int16x8_t vec, __c…
9355 #define vld1q_lane_s16(ptr, vec, lane) _MM_INSERT_EPI16(vec, *(ptr), lane) macro
10708 v.val[0] = vld1q_lane_s16 (ptr, src->val[0], lane);
10709 v.val[1] = vld1q_lane_s16 ((ptr + 1), src->val[1], lane);
10728 v.val[0] = vld1q_lane_s16 (ptr, src->val[0], lane);
10729 v.val[1] = vld1q_lane_s16 ((ptr + 1), src->val[1], lane);
12076 return vld1q_lane_s16(&val, vec, lane);