| /external/XNNPACK/scripts/ |
| D | generate-f32-vbinary.sh | 9 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=ADD -D BATCH_TILE=1 -D WASM=0 -D ACTIVATION=M…
10 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=ADD -D BATCH_TILE=2 -D WASM=0 -D ACTIVATION=M…
11 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=ADD -D BATCH_TILE=4 -D WASM=0 -D ACTIVATION=M…
12 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=ADD -D BATCH_TILE=8 -D WASM=0 -D ACTIVATION=M…
13 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=DIV -D BATCH_TILE=1 -D WASM=0 -D ACTIVATION=M…
14 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=DIV -D BATCH_TILE=2 -D WASM=0 -D ACTIVATION=M…
15 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=DIV -D BATCH_TILE=4 -D WASM=0 -D ACTIVATION=M…
16 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=DIV -D BATCH_TILE=8 -D WASM=0 -D ACTIVATION=M…
17 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=MUL -D BATCH_TILE=1 -D WASM=0 -D ACTIVATION=M…
18 tools/xngen src/f32-vbinary/vop-scalar.c.in -D OP=MUL -D BATCH_TILE=2 -D WASM=0 -D ACTIVATION=M…
[all …]
|
| D | generate-f16-vbinary.sh | 8 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=ADD -D BATCH_TILE=8 -D ACTIVATION=MIN…
9 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=ADD -D BATCH_TILE=16 -D ACTIVATION=MIN…
10 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=DIV -D BATCH_TILE=8 -D ACTIVATION=MIN…
11 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=DIV -D BATCH_TILE=16 -D ACTIVATION=MIN…
12 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MAX -D BATCH_TILE=8 -D ACTIVATION=LIN…
13 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MAX -D BATCH_TILE=16 -D ACTIVATION=LIN…
14 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MIN -D BATCH_TILE=8 -D ACTIVATION=LIN…
15 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MIN -D BATCH_TILE=16 -D ACTIVATION=LIN…
16 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MUL -D BATCH_TILE=8 -D ACTIVATION=MIN…
17 tools/xngen src/f16-vbinary/vop-neonfp16arith.c.in -D OP=MUL -D BATCH_TILE=16 -D ACTIVATION=MIN…
[all …]
|
| /external/mesa3d/src/gallium/frontends/va/ |
| D | picture_mpeg4.c | 147 uint8_t vop[] = { 0x00, 0x00, 0x01, 0xb6, 0x00, 0x00, 0x00, 0x00, 0x00 }; in vlVaDecoderFixMPEG4Startcode() local
148 struct bit_stream bs_vop = {vop, sizeof(vop)*8, 32}; in vlVaDecoderFixMPEG4Startcode()
207 memcpy(context->mpeg4.start_code + context->mpeg4.start_code_size, vop, vop_size); in vlVaDecoderFixMPEG4Startcode()
|
| /external/llvm-project/llvm/lib/Target/RISCV/ |
| D | RISCVInstrInfoVPseudos.td | 163 multiclass pat_vop_binary<SDNode vop,
175 def : Pat<(result_type (vop
185 multiclass pat_vop_binary_common<SDNode vop,
190 defm : pat_vop_binary<vop, instruction_name,
|
| /external/mesa3d/src/mapi/glapi/gen/ |
| D | glX_XML.py | 137 vop = child.get( 'vendorpriv' )
145 if vop:
146 self.glx_vendorpriv = int(vop)
|
| /external/mesa3d/src/glx/ |
| D | indirect_vertex_program.c | 180 get_vertex_attrib(struct glx_context * gc, unsigned vop, in get_vertex_attrib() argument
186 vop, 8); in get_vertex_attrib()
|
| /external/llvm-project/llvm/test/CodeGen/AMDGPU/ |
| D | vop-shrink.ll | 9 ; ModuleID = 'vop-shrink.ll'
|
| /external/llvm/test/CodeGen/AMDGPU/ |
| D | vop-shrink.ll | 9 ; ModuleID = 'vop-shrink.ll'
|
| /external/vixl/src/aarch64/ |
| D | assembler-aarch64.cc | 2383 NEON3DifferentOp vop) { in NEON3DifferentL() argument
2389 Instr format, op = vop; in NEON3DifferentL()
2403 NEON3DifferentOp vop) { in NEON3DifferentW() argument
2408 Emit(VFormat(vm) | vop | Rm(vm) | Rn(vn) | Rd(vd)); in NEON3DifferentW()
2415 NEON3DifferentOp vop) { in NEON3DifferentHN() argument
2420 Emit(VFormat(vd) | vop | Rm(vm) | Rn(vn) | Rd(vd)); in NEON3DifferentHN()
3297 NEON3SameOp vop) { in NEON3Same() argument
3301 Instr format, op = vop; in NEON3Same()
3435 NEON2RegMiscOp vop, in NEON2RegMisc() argument
3441 Instr format, op = vop; in NEON2RegMisc()
[all …]
|
| D | assembler-aarch64.h | 6903 void NEONFP2Same(const VRegister& vd, const VRegister& vn, Instr vop);
6907 NEON3SameOp vop);
6919 NEON3DifferentOp vop);
6923 NEON3DifferentOp vop);
6927 NEON3DifferentOp vop);
6930 NEON2RegMiscOp vop,
6934 NEON2RegMiscFP16Op vop,
6938 NEON2RegMiscOp vop,
6983 void NEONXtn(const VRegister& vd, const VRegister& vn, NEON2RegMiscOp vop);
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| D | radeon_vcn_dec.h | 572 } vop; member
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIInstrInfo.td | 17 class vop {
22 class vopc <bits<8> si, bits<8> vi = !add(0x40, si)> : vop {
30 class vop1 <bits<8> si, bits<8> vi = si> : vop {
38 class vop2 <bits<6> si, bits<6> vi = si> : vop {
52 class vop3 <bits<9> si, bits<10> vi = {0, si}> : vop {
1957 multiclass VOP3_m <vop op, dag outs, dag ins, string asm, list<dag> pattern,
1972 multiclass VOP3_1_m <vop op, dag outs, dag ins, string asm,
1984 multiclass VOP3SI_1_m <vop op, dag outs, dag ins, string asm,
1994 multiclass VOP3_2_m <vop op, dag outs, dag ins, string asm,
2008 multiclass VOP3SI_2_m <vop op, dag outs, dag ins, string asm,
[all …]
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| /external/cldr/common/testData/transforms/ |
| D | hy-Latn-t-hy-m0-bgn.txt | 383 ամփոփված amp’vop’vats
|
| /external/llvm-project/llvm/test/Bitcode/ |
| D | compatibility.ll | 1384 define void @instructions.other(i32 %op1, i32 %op2, half %fop1, half %fop2, <2 x i32> %vop, i8* %po…
1470 freeze <2 x i32> %vop
1471 ; CHECK: freeze <2 x i32> %vop
|