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Searched refs:vop3 (Results 1 – 15 of 15) sorted by relevance

/external/mesa3d/src/amd/compiler/
Daco_ir.cpp171 VOP3A_instruction *vop3 = static_cast<VOP3A_instruction*>(instr.get()); in can_use_SDWA() local
174 if (vop3->clamp && instr->format == asVOP3(Format::VOPC) && chip != GFX8) in can_use_SDWA()
176 if (vop3->omod && chip < GFX9) in can_use_SDWA()
236 VOP3A_instruction *vop3 = static_cast<VOP3A_instruction*>(tmp.get()); in convert_to_SDWA() local
237 memcpy(sdwa->neg, vop3->neg, sizeof(sdwa->neg)); in convert_to_SDWA()
238 memcpy(sdwa->abs, vop3->abs, sizeof(sdwa->abs)); in convert_to_SDWA()
239 sdwa->omod = vop3->omod; in convert_to_SDWA()
240 sdwa->clamp = vop3->clamp; in convert_to_SDWA()
Daco_print_ir.cpp580 const VOP3A_instruction* vop3 = static_cast<const VOP3A_instruction*>(instr); in print_instr_format_specific() local
581 switch (vop3->omod) { in print_instr_format_specific()
592 if (vop3->clamp) in print_instr_format_specific()
594 if (vop3->opsel & (1 << 3)) in print_instr_format_specific()
686 const VOP3A_instruction* vop3 = static_cast<const VOP3A_instruction*>(instr); in aco_print_instr() local
688 abs[i] = vop3->abs[i]; in aco_print_instr()
689 neg[i] = vop3->neg[i]; in aco_print_instr()
690 opsel[i] = vop3->opsel & (1 << i); in aco_print_instr()
749 const VOP3P_instruction* vop3 = static_cast<const VOP3P_instruction*>(instr); in aco_print_instr() local
750 if ((vop3->opsel_lo & (1 << i)) || !(vop3->opsel_hi & (1 << i))) { in aco_print_instr()
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Daco_assembler.cpp550 VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr); in emit_instruction() local
576 encoding |= (vop3->clamp ? 1 : 0) << 11; in emit_instruction()
579 encoding |= (vop3->clamp ? 1 : 0) << 15; in emit_instruction()
581 encoding |= vop3->opsel << 11; in emit_instruction()
583 encoding |= vop3->abs[i] << (8+i); in emit_instruction()
595 encoding |= vop3->omod << 27; in emit_instruction()
597 encoding |= vop3->neg[i] << (29+i); in emit_instruction()
601 VOP3P_instruction* vop3 = static_cast<VOP3P_instruction*>(instr); in emit_instruction() local
613 encoding |= (vop3->clamp ? 1 : 0) << 15; in emit_instruction()
614 encoding |= vop3->opsel_lo << 11; in emit_instruction()
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Daco_optimizer.cpp1335 VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr.get()); in label_instruction() local
1336 if (vop3->abs[0] || vop3->abs[1] || vop3->abs[2] || in label_instruction()
1337 vop3->neg[0] || vop3->neg[1] || vop3->neg[2] || in label_instruction()
1338 vop3->omod != 0 || vop3->opsel != 0) in label_instruction()
1651 VOP3A_instruction *vop3 = static_cast<VOP3A_instruction*>(op_instr[i]); in combine_ordering_test() local
1652 …if (vop3->neg[0] != vop3->neg[1] || vop3->abs[0] != vop3->abs[1] || vop3->opsel == 1 || vop3->opse… in combine_ordering_test()
1654 neg[i] = vop3->neg[0]; in combine_ordering_test()
1655 abs[i] = vop3->abs[0]; in combine_ordering_test()
1656 opsel |= (vop3->opsel & 1) << i; in combine_ordering_test()
1695 …VOP3A_instruction *vop3 = create_instruction<VOP3A_instruction>(new_op, asVOP3(Format::VOPC), 2, 1… in combine_ordering_test() local
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Daco_lower_to_hw_instr.cpp218 bld.vop3(aco_opcode::v_add_co_u32_e64, dst[0], bld.def(bld.lm, vcc), vtmp_op[0], src1[0]); in emit_int64_dpp_op()
287 bld.vop3(aco_opcode::v_mul_lo_u32, vtmp_def[1], vtmp_op[0], src1[0]); in emit_int64_dpp_op()
292 bld.vop3(aco_opcode::v_mul_lo_u32, vtmp_def[0], vtmp_op[0], src1[1]); in emit_int64_dpp_op()
298 bld.vop3(aco_opcode::v_mul_hi_u32, vtmp_def[0], vtmp_op[0], src1[0]); in emit_int64_dpp_op()
304 bld.vop3(aco_opcode::v_mul_lo_u32, dst[0], vtmp_op[0], src1[0]); in emit_int64_dpp_op()
335 bld.vop3(aco_opcode::v_add_co_u32_e64, dst[0], bld.def(bld.lm, vcc), src0[0], src1[0]); in emit_int64_op()
392 bld.vop3(aco_opcode::v_mul_lo_u32, tmp0_def, src0[1], src1[0]); in emit_int64_op()
393 bld.vop3(aco_opcode::v_mul_lo_u32, tmp1_def, src0[0], src1[1]); in emit_int64_op()
395 bld.vop3(aco_opcode::v_mul_hi_u32, tmp1_def, src0[0], src1[0]); in emit_int64_op()
397 bld.vop3(aco_opcode::v_mul_lo_u32, dst[0], src0[0], src1[0]); in emit_int64_op()
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Daco_instruction_selection.cpp137 return bld.vop3(aco_opcode::v_mbcnt_lo_u32_b32, Definition(dst), mask_lo, base); in emit_mbcnt()
152 Temp mbcnt_lo = bld.vop3(aco_opcode::v_mbcnt_lo_u32_b32, bld.def(v1), mask_lo, base); in emit_mbcnt()
157 return bld.vop3(aco_opcode::v_mbcnt_hi_u32_b32_e64, Definition(dst), mask_hi, mbcnt_lo); in emit_mbcnt()
302 bld.vop3(aco_opcode::v_mul_hi_u32, Definition(multiply_dst), increment_dst, in emit_v_div_u32()
485 tmp[i] = bld.vop3(aco_opcode::v_alignbyte_b32, bld.def(v1), tmp[i + 1], tmp[i], offset); in byte_align_vector()
598 bld.vop3(opcode, Definition(tmp), src, Operand(0u), Operand(src_bits == 8 ? 8u : 16u)); in convert_int()
805 tmp = bld.vop3(op, bld.def(dst.regClass()), src[0], src[1], src[2]); in emit_vop3a_instruction()
807 tmp = bld.vop3(op, bld.def(dst.regClass()), src[0], src[1]); in emit_vop3a_instruction()
811 … bld.vop3(aco_opcode::v_mul_f64, Definition(dst), Operand(UINT64_C(0x3FF0000000000000)), tmp); in emit_vop3a_instruction()
813 bld.vop3(op, Definition(dst), src[0], src[1], src[2]); in emit_vop3a_instruction()
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Daco_ir.h1359 const VOP3A_instruction *vop3 = static_cast<const VOP3A_instruction*>(this); in usesModifiers() local
1361 if (vop3->abs[i] || vop3->neg[i]) in usesModifiers()
1364 return vop3->opsel || vop3->clamp || vop3->omod; in usesModifiers()
Daco_validate.cpp195 VOP3A_instruction *vop3 = static_cast<VOP3A_instruction*>(instr.get()); in validate_ir() local
196 …check(vop3->opsel == 0 || program->chip_class >= GFX9, "Opsel is only supported on GFX9+", instr.g… in validate_ir()
201 check((vop3->opsel & (1 << i)) == 0, "Unexpected opsel for operand", instr.get()); in validate_ir()
204 … check((vop3->opsel & (1 << 3)) == 0, "Unexpected opsel for sub-dword definition", instr.get()); in validate_ir()
Daco_register_allocation.cpp400 VOP3A_instruction *vop3 = static_cast<VOP3A_instruction *>(instr.get()); in add_subdword_operand() local
401 vop3->opsel |= (byte / 2) << idx; in add_subdword_operand()
503 VOP3A_instruction *vop3 = static_cast<VOP3A_instruction *>(instr.get()); in add_subdword_definition() local
505 vop3->opsel |= (1 << 3); /* dst in high half */ in add_subdword_definition()
/external/llvm/lib/Target/AMDGPU/
DCIInstructions.td62 defm V_QSAD_PK_U16_U8 : VOP3Inst <vop3<0x173>, "v_qsad_pk_u16_u8",
65 defm V_MQSAD_U16_U8 : VOP3Inst <vop3<0x172>, "v_mqsad_u16_u8",
68 defm V_MQSAD_U32_U8 : VOP3Inst <vop3<0x175>, "v_mqsad_u32_u8",
73 defm V_MAD_U64_U32 : VOP3Inst <vop3<0x176>, "v_mad_u64_u32",
78 defm V_MAD_I64_I32 : VOP3Inst <vop3<0x177>, "v_mad_i64_i32",
DVIInstructions.td82 defm V_MAD_F16 : VOP3Inst <vop3<0, 0x1ea>, "v_mad_f16", VOP_F16_F16_F16_F16>;
83 defm V_MAD_U16 : VOP3Inst <vop3<0, 0x1eb>, "v_mad_u16", VOP_I16_I16_I16_I16>;
84 defm V_MAD_I16 : VOP3Inst <vop3<0, 0x1ec>, "v_mad_i16", VOP_I16_I16_I16_I16>;
DSIInstructions.td1593 vop3 <0x001, 0x289>,
1601 vop3 <0x002, 0x28a>,
1673 defm V_MAD_LEGACY_F32 : VOP3Inst <vop3<0x140, 0x1c0>, "v_mad_legacy_f32",
1677 defm V_MAD_F32 : VOP3Inst <vop3<0x141, 0x1c1>, "v_mad_f32",
1681 defm V_MAD_I32_I24 : VOP3Inst <vop3<0x142, 0x1c2>, "v_mad_i32_i24",
1684 defm V_MAD_U32_U24 : VOP3Inst <vop3<0x143, 0x1c3>, "v_mad_u32_u24",
1689 defm V_CUBEID_F32 : VOP3Inst <vop3<0x144, 0x1c4>, "v_cubeid_f32",
1692 defm V_CUBESC_F32 : VOP3Inst <vop3<0x145, 0x1c5>, "v_cubesc_f32",
1695 defm V_CUBETC_F32 : VOP3Inst <vop3<0x146, 0x1c6>, "v_cubetc_f32",
1698 defm V_CUBEMA_F32 : VOP3Inst <vop3<0x147, 0x1c7>, "v_cubema_f32",
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DSIInstrInfo.td52 class vop3 <bits<9> si, bits<10> vi = {0, si}> : vop {
2073 multiclass VOP2SI_3VI_m <vop3 op, string opName, dag outs, dag ins,
2439 multiclass VOP3_Helper <vop3 op, string opName, dag outs, dag ins, string asm,
2445 multiclass VOP3Inst <vop3 op, string opName, VOPProfile P,
2476 multiclass VOP3_VCC_Inst <vop3 op, string opName,
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/
DAMDGPU.td475 def FeatureVOP3Literal : SubtargetFeature<"vop3-literal",
/external/llvm-project/llvm/lib/Target/AMDGPU/
DAMDGPU.td548 def FeatureVOP3Literal : SubtargetFeature<"vop3-literal",