| /external/llvm-project/llvm/test/MC/ARM/ |
| D | mve-bitops.s | 17 vorn.i16 q0, #0xff12
21 vorn.i32 q0, #0xffff12ff
25 vorn.i32 q0, #0xff12ffff
29 vorn.i32 q0, #0x12ffffff
32 vorn.i16 q0, #0xed00
35 vorn.i16 q0, #0x00ed
38 vorn.i32 q0, #0xed000000
41 vorn.i32 q0, #0x00ed0000
44 vorn.i32 q0, #0x0000ed00
47 vorn.i32 q0, #0x000000ed
[all …]
|
| D | neont2-bitwise-encoding.s | 37 vorn d16, d17, d16
38 vorn q8, q8, q9
40 @ CHECK: vorn d16, d17, d16 @ encoding: [0x71,0xef,0xb0,0x01]
41 @ CHECK: vorn q8, q8, q9 @ encoding: [0x70,0xef,0xf2,0x01]
|
| D | neon-bitwise-encoding.s | 90 vorn d16, d17, d16
91 vorn q8, q8, q9
93 @ CHECK: vorn d16, d17, d16 @ encoding: [0xb0,0x01,0x71,0xf2]
94 @ CHECK: vorn q8, q8, q9 @ encoding: [0xf2,0x01,0x70,0xf2]
|
| /external/llvm/test/MC/ARM/ |
| D | neont2-bitwise-encoding.s | 37 vorn d16, d17, d16
38 vorn q8, q8, q9
40 @ CHECK: vorn d16, d17, d16 @ encoding: [0x71,0xef,0xb0,0x01]
41 @ CHECK: vorn q8, q8, q9 @ encoding: [0x70,0xef,0xf2,0x01]
|
| D | neon-bitwise-encoding.s | 90 vorn d16, d17, d16
91 vorn q8, q8, q9
93 @ CHECK: vorn d16, d17, d16 @ encoding: [0xb0,0x01,0x71,0xf2]
94 @ CHECK: vorn q8, q8, q9 @ encoding: [0xf2,0x01,0x70,0xf2]
|
| /external/capstone/suite/MC/ARM/ |
| D | neont2-bitwise-encoding.s.cs | 10 0x71,0xef,0xb0,0x01 = vorn d16, d17, d16
11 0x70,0xef,0xf2,0x01 = vorn q8, q8, q9
|
| D | neon-bitwise-encoding.s.cs | 17 0xb0,0x01,0x71,0xf2 = vorn d16, d17, d16
18 0xf2,0x01,0x70,0xf2 = vorn q8, q8, q9
|
| /external/arm-neon-tests/ |
| D | ref_vorn.c | 26 #define INSN_NAME vorn
|
| D | Makefile.gcc | 52 vqrdmulh_lane vqrshl vaba vabal vabd vabdl vand vorr vorn \
|
| D | Makefile | 46 vqrdmulh_lane vqrshl vaba vabal vabd vabdl vand vorr vorn \
|
| /external/llvm-project/llvm/test/CodeGen/Thumb2/mve-intrinsics/ |
| D | vornq.ll | 7 ; CHECK-NEXT: vorn q0, q0, q1
18 ; CHECK-NEXT: vorn q0, q0, q1
29 ; CHECK-NEXT: vorn q0, q0, q1
40 ; CHECK-NEXT: vorn q0, q0, q1
|
| /external/llvm-project/llvm/test/CodeGen/Thumb2/ |
| D | mve-bitarith.ll | 215 ; CHECK-NEXT: vorn q0, q1, q0
226 ; CHECK-NEXT: vorn q0, q1, q0
237 ; CHECK-NEXT: vorn q0, q1, q0
248 ; CHECK-NEXT: vorn q0, q1, q0
|
| D | mve-satmul-loops.ll | 808 ; CHECK-NEXT: vorn q0, q1, q0
972 ; CHECK-NEXT: vorn q1, q3, q1
1000 ; CHECK-NEXT: vorn q0, q2, q0
|
| /external/llvm/test/CodeGen/ARM/ |
| D | vbits.ll | 365 ;CHECK: vorn
375 ;CHECK: vorn
385 ;CHECK: vorn
395 ;CHECK: vorn
405 ;CHECK: vorn
415 ;CHECK: vorn
425 ;CHECK: vorn
435 ;CHECK: vorn
|
| /external/llvm-project/llvm/test/CodeGen/ARM/ |
| D | vbits.ll | 581 ; CHECK-NEXT: vorn d16, d17, d16
596 ; CHECK-NEXT: vorn d16, d17, d16
611 ; CHECK-NEXT: vorn d16, d17, d16
626 ; CHECK-NEXT: vorn d16, d17, d16
641 ; CHECK-NEXT: vorn q8, q9, q8
657 ; CHECK-NEXT: vorn q8, q9, q8
673 ; CHECK-NEXT: vorn q8, q9, q8
689 ; CHECK-NEXT: vorn q8, q9, q8
|
| /external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
| D | mve-bitops.txt | 42 # CHECK: vorn q0, q3, q2 @ encoding: [0x36,0xef,0x54,0x01]
|
| D | neont2.txt | 309 # CHECK: vorn d16, d17, d16
311 # CHECK: vorn q8, q8, q9
|
| D | neon.txt | 315 # CHECK: vorn d16, d17, d16
317 # CHECK: vorn q8, q8, q9
|
| /external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
| D | cortex-a57-neon-instructions.s | 148 vorn d16, d17, d16
149 vorn q8, q8, q9
1264 # CHECK-NEXT: 1 3 0.50 vorn d16, d17, d16
1265 # CHECK-NEXT: 1 3 0.50 vorn q8, q8, q9
2387 # CHECK-NEXT: - - - - - - 0.50 0.50 vorn d16, d17, d16
2388 # CHECK-NEXT: - - - - - - 0.50 0.50 vorn q8, q8, q9
|
| /external/vixl/src/aarch32/ |
| D | assembler-aarch32.h | 5100 void vorn(Condition cond,
5105 void vorn(DataType dt, DRegister rd, DRegister rn, const DOperand& operand) { in vorn() function
5106 vorn(al, dt, rd, rn, operand); in vorn()
5109 void vorn(Condition cond,
5114 void vorn(DataType dt, QRegister rd, QRegister rn, const QOperand& operand) { in vorn() function
5115 vorn(al, dt, rd, rn, operand); in vorn()
|
| D | disasm-aarch32.h | 2098 void vorn(Condition cond,
2104 void vorn(Condition cond,
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
| D | ARMInstrMVE.td | 1312 def MVE_VORN : MVE_bit_ops<"vorn", 0b11, 0b0>;
1323 def : MVEInstAlias<"vorn${vp}." # s # "\t$QdSrc, $QnSrc, $QmSrc",
1418 def MVE_VORNIZ0v4i32 : MVEAsmPseudo<"vorn${vp}.i32\t$Qd, $imm",
1420 def MVE_VORNIZ0v8i16 : MVEAsmPseudo<"vorn${vp}.i16\t$Qd, $imm",
1422 def MVE_VORNIZ8v4i32 : MVEAsmPseudo<"vorn${vp}.i32\t$Qd, $imm",
1424 def MVE_VORNIZ8v8i16 : MVEAsmPseudo<"vorn${vp}.i16\t$Qd, $imm",
1426 def MVE_VORNIZ16v4i32 : MVEAsmPseudo<"vorn${vp}.i32\t$Qd, $imm",
1428 def MVE_VORNIZ24v4i32 : MVEAsmPseudo<"vorn${vp}.i32\t$Qd, $imm",
|
| /external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
| D | ARMGenAsmMatcher.inc | 9937 "mullb\006vmullt\004vmvn\004vneg\005vnmla\005vnmls\005vnmul\004vorn\004v"
13520 …{ 2899 /* vorn */, ARM::VORNq, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_…
13521 …{ 2899 /* vorn */, ARM::VORNd, Convert__Reg1_1__Reg1_2__Reg1_3__CondCode2_0, AMFBS_HasNEON, { MCK_…
13522 …{ 2899 /* vorn */, ARM::MVE_VORNIZ0v8i16, Convert__Reg1_2__imm_95_0__InvertedExpandImm0_161_3__VPT…
13523 …{ 2899 /* vorn */, ARM::MVE_VORNIZ8v8i16, Convert__Reg1_2__imm_95_0__InvertedExpandImm8_161_3__VPT…
13524 …{ 2899 /* vorn */, ARM::MVE_VORNIZ0v4i32, Convert__Reg1_2__imm_95_0__InvertedExpandImm0_321_3__VPT…
13525 …{ 2899 /* vorn */, ARM::MVE_VORNIZ8v4i32, Convert__Reg1_2__imm_95_0__InvertedExpandImm8_321_3__VPT…
13526 …{ 2899 /* vorn */, ARM::MVE_VORNIZ16v4i32, Convert__Reg1_2__imm_95_0__InvertedExpandImm16_321_3__V…
13527 …{ 2899 /* vorn */, ARM::MVE_VORNIZ24v4i32, Convert__Reg1_2__imm_95_0__InvertedExpandImm24_321_3__V…
13528 …{ 2899 /* vorn */, ARM::MVE_VORN, Convert__Reg1_1__Reg1_2__Reg1_3__VPTPredR3_0, AMFBS_HasMVEInt, {…
[all …]
|
| /external/llvm/test/MC/Disassembler/ARM/ |
| D | neont2.txt | 309 # CHECK: vorn d16, d17, d16
311 # CHECK: vorn q8, q8, q9
|
| D | neon.txt | 315 # CHECK: vorn d16, d17, d16
317 # CHECK: vorn q8, q8, q9
|