/external/llvm-project/llvm/test/MC/ARM/ |
D | neon-mul-accum-encoding.s | 39 vqdmlal.s16 q8, d19, d18 40 vqdmlal.s32 q8, d19, d18 41 vqdmlal.s16 q11, d11, d7[0] 42 vqdmlal.s16 q11, d11, d7[1] 43 vqdmlal.s16 q11, d11, d7[2] 44 vqdmlal.s16 q11, d11, d7[3] 46 @ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xf2] 47 @ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xf2] 48 @ CHECK: vqdmlal.s16 q11, d11, d7[0] @ encoding: [0x47,0x63,0xdb,0xf2] 49 @ CHECK: vqdmlal.s16 q11, d11, d7[1] @ encoding: [0x4f,0x63,0xdb,0xf2] [all …]
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D | neont2-mul-accum-encoding.s | 43 vqdmlal.s16 q8, d19, d18 44 vqdmlal.s32 q8, d19, d18 45 vqdmlal.s16 q11, d11, d7[0] 46 vqdmlal.s16 q11, d11, d7[1] 47 vqdmlal.s16 q11, d11, d7[2] 48 vqdmlal.s16 q11, d11, d7[3] 50 @ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xd3,0xef,0xa2,0x09] 51 @ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xe3,0xef,0xa2,0x09] 52 @ CHECK: vqdmlal.s16 q11, d11, d7[0] @ encoding: [0xdb,0xef,0x47,0x63] 53 @ CHECK: vqdmlal.s16 q11, d11, d7[1] @ encoding: [0xdb,0xef,0x4f,0x63] [all …]
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/external/llvm/test/MC/ARM/ |
D | neon-mul-accum-encoding.s | 39 vqdmlal.s16 q8, d19, d18 40 vqdmlal.s32 q8, d19, d18 41 vqdmlal.s16 q11, d11, d7[0] 42 vqdmlal.s16 q11, d11, d7[1] 43 vqdmlal.s16 q11, d11, d7[2] 44 vqdmlal.s16 q11, d11, d7[3] 46 @ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xa2,0x09,0xd3,0xf2] 47 @ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xa2,0x09,0xe3,0xf2] 48 @ CHECK: vqdmlal.s16 q11, d11, d7[0] @ encoding: [0x47,0x63,0xdb,0xf2] 49 @ CHECK: vqdmlal.s16 q11, d11, d7[1] @ encoding: [0x4f,0x63,0xdb,0xf2] [all …]
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D | neont2-mul-accum-encoding.s | 43 vqdmlal.s16 q8, d19, d18 44 vqdmlal.s32 q8, d19, d18 45 vqdmlal.s16 q11, d11, d7[0] 46 vqdmlal.s16 q11, d11, d7[1] 47 vqdmlal.s16 q11, d11, d7[2] 48 vqdmlal.s16 q11, d11, d7[3] 50 @ CHECK: vqdmlal.s16 q8, d19, d18 @ encoding: [0xd3,0xef,0xa2,0x09] 51 @ CHECK: vqdmlal.s32 q8, d19, d18 @ encoding: [0xe3,0xef,0xa2,0x09] 52 @ CHECK: vqdmlal.s16 q11, d11, d7[0] @ encoding: [0xdb,0xef,0x47,0x63] 53 @ CHECK: vqdmlal.s16 q11, d11, d7[1] @ encoding: [0xdb,0xef,0x4f,0x63] [all …]
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/external/capstone/suite/MC/ARM/ |
D | neon-mul-accum-encoding.s.cs | 17 0xa2,0x09,0xd3,0xf2 = vqdmlal.s16 q8, d19, d18 18 0xa2,0x09,0xe3,0xf2 = vqdmlal.s32 q8, d19, d18 19 0x47,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[0] 20 0x4f,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[1] 21 0x67,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[2] 22 0x6f,0x63,0xdb,0xf2 = vqdmlal.s16 q11, d11, d7[3]
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D | neont2-mul-accum-encoding.s.cs | 18 0xd3,0xef,0xa2,0x09 = vqdmlal.s16 q8, d19, d18 19 0xe3,0xef,0xa2,0x09 = vqdmlal.s32 q8, d19, d18 20 0xdb,0xef,0x47,0x63 = vqdmlal.s16 q11, d11, d7[0] 21 0xdb,0xef,0x4f,0x63 = vqdmlal.s16 q11, d11, d7[1] 22 0xdb,0xef,0x67,0x63 = vqdmlal.s16 q11, d11, d7[2] 23 0xdb,0xef,0x6f,0x63 = vqdmlal.s16 q11, d11, d7[3]
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/external/arm-neon-tests/ |
D | ref_vqdmlal.c | 35 #define INSN_NAME vqdmlal
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D | Makefile.gcc | 46 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
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D | Makefile | 40 vqsub vqdmulh_lane vqdmull vqdmlal vqdmlsl vceq vcge vcle \
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/external/llvm/test/CodeGen/ARM/ |
D | vqdmul.ll | 202 ;CHECK: vqdmlal.s16 213 ;CHECK: vqdmlal.s32 225 ; CHECK: vqdmlal.s16 q0, d2, d3[1] 235 ; CHECK: vqdmlal.s32 q0, d2, d3[1]
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/external/llvm-project/llvm/test/CodeGen/ARM/ |
D | vqdmul.ll | 202 ;CHECK: vqdmlal.s16 213 ;CHECK: vqdmlal.s32 225 ; CHECK: vqdmlal.s16 q0, d2, d3[1] 235 ; CHECK: vqdmlal.s32 q0, d2, d3[1]
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/external/llvm-project/clang/include/clang/Basic/ |
D | arm_neon.td | 71 def OP_QDMLAL_N : Op<(call "vqdmlal", $p0, $p1, (dup $p2))>; 72 def OP_QDMLAL_LN : Op<(call "vqdmlal", $p0, $p1, (call_mangled "splat_lane", $p2, $p3))>; 73 def OP_QDMLALHi_LN : Op<(call "vqdmlal", $p0, (call "vget_high", $p1), 150 def OP_QDMLALHi : Op<(call "vqdmlal", $p0, (call "vget_high", $p1), 333 def VQDMLAL : SInst<"vqdmlal", "(>Q)(>Q)..", "si">; 1489 def SCALAR_SQDMLAL : SInst<"vqdmlal", "(1>)(1>)11", "SsSi">;
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/external/clang/include/clang/Basic/ |
D | arm_neon.td | 369 def OP_QDMLAL_LN : Op<(call "vqdmlal", $p0, $p1, (splat $p2, $p3))>; 370 def OP_QDMLALHi_LN : Op<(call "vqdmlal", $p0, (call "vget_high", $p1), 443 def OP_QDMLALHi : Op<(call "vqdmlal", $p0, (call "vget_high", $p1), 533 def VQDMLAL : SInst<"vqdmlal", "wwdd", "si">; 1577 def SCALAR_SQDMLAL : SInst<"vqdmlal", "rrss", "SsSi">;
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/external/llvm-project/llvm/test/tools/llvm-mca/ARM/ |
D | cortex-a57-neon-instructions.s | 338 vqdmlal.s16 q8, d19, d18 339 vqdmlal.s32 q8, d19, d18 1454 # CHECK-NEXT: 1 5 1.00 vqdmlal.s16 q8, d19, d18 1455 # CHECK-NEXT: 1 5 1.00 vqdmlal.s32 q8, d19, d18 2577 # CHECK-NEXT: - - - - - - 1.00 - vqdmlal.s16 q8, d19, d18 2578 # CHECK-NEXT: - - - - - - 1.00 - vqdmlal.s32 q8, d19, d18
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/external/vixl/src/aarch32/ |
D | assembler-aarch32.h | 5242 void vqdmlal( 5244 void vqdmlal(DataType dt, QRegister rd, DRegister rn, DRegister rm) { in vqdmlal() function 5245 vqdmlal(al, dt, rd, rn, rm); in vqdmlal() 5248 void vqdmlal(Condition cond, 5254 void vqdmlal( in vqdmlal() function 5256 vqdmlal(al, dt, rd, rn, dm, index); in vqdmlal()
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D | disasm-aarch32.h | 2157 void vqdmlal( 2160 void vqdmlal(Condition cond,
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D | disasm-aarch32.cc | 5730 void Disassembler::vqdmlal( in vqdmlal() function in vixl::aarch32::Disassembler 5737 void Disassembler::vqdmlal(Condition cond, in vqdmlal() function in vixl::aarch32::Disassembler 28679 vqdmlal(CurrentCond(), in DecodeT32() 29128 vqdmlal(CurrentCond(), in DecodeT32() 42844 vqdmlal(al, in DecodeA32() 43248 vqdmlal(al, in DecodeA32()
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D | assembler-aarch32.cc | 22627 void Assembler::vqdmlal( in vqdmlal() function in vixl::aarch32::Assembler 22652 Delegate(kVqdmlal, &Assembler::vqdmlal, cond, dt, rd, rn, rm); in vqdmlal() 22655 void Assembler::vqdmlal(Condition cond, in vqdmlal() function in vixl::aarch32::Assembler 22702 Delegate(kVqdmlal, &Assembler::vqdmlal, cond, dt, rd, rn, dm, index); in vqdmlal()
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/external/llvm/test/MC/Disassembler/ARM/ |
D | neont2.txt | 618 # CHECK: vqdmlal.s16 q8, d19, d18 620 # CHECK: vqdmlal.s32 q8, d19, d18
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D | neon.txt | 721 # CHECK: vqdmlal.s16 q8, d19, d18 723 # CHECK: vqdmlal.s32 q8, d19, d18
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/external/llvm-project/llvm/test/MC/Disassembler/ARM/ |
D | neont2.txt | 628 # CHECK: vqdmlal.s16 q8, d19, d18 630 # CHECK: vqdmlal.s32 q8, d19, d18
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D | neon.txt | 730 # CHECK: vqdmlal.s16 q8, d19, d18 732 # CHECK: vqdmlal.s32 q8, d19, d18
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/external/capstone/arch/AArch64/ |
D | ARMMappingInsnOp.inc | 3544 { /* ARM_VQDMLALslv2i32, ARM_INS_VQDMLAL: vqdmlal${p}.s32 $vd, $vn, $vm$lane */ 3547 { /* ARM_VQDMLALslv4i16, ARM_INS_VQDMLAL: vqdmlal${p}.s16 $vd, $vn, $vm$lane */ 3550 { /* ARM_VQDMLALv2i64, ARM_INS_VQDMLAL: vqdmlal${p}.s32 $vd, $vn, $vm */ 3553 { /* ARM_VQDMLALv4i32, ARM_INS_VQDMLAL: vqdmlal${p}.s16 $vd, $vn, $vm */
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/external/capstone/arch/ARM/ |
D | ARMMappingInsnOp.inc | 3544 { /* ARM_VQDMLALslv2i32, ARM_INS_VQDMLAL: vqdmlal${p}.s32 $vd, $vn, $vm$lane */ 3547 { /* ARM_VQDMLALslv4i16, ARM_INS_VQDMLAL: vqdmlal${p}.s16 $vd, $vn, $vm$lane */ 3550 { /* ARM_VQDMLALv2i64, ARM_INS_VQDMLAL: vqdmlal${p}.s32 $vd, $vn, $vm */ 3553 { /* ARM_VQDMLALv4i32, ARM_INS_VQDMLAL: vqdmlal${p}.s16 $vd, $vn, $vm */
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/external/swiftshader/third_party/llvm-10.0/configs/common/lib/Target/ARM/ |
D | ARMGenAsmMatcher.inc | 9940 "vqdmlah\007vqdmlal\010vqdmlash\010vqdmlsdh\tvqdmlsdhx\007vqdmlsl\007vqd" 13766 …{ 3012 /* vqdmlal */, ARM::VQDMLALv4i32, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__CondCode2_0, A… 13767 …{ 3012 /* vqdmlal */, ARM::VQDMLALv2i64, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__CondCode2_0, A… 13768 …{ 3012 /* vqdmlal */, ARM::VQDMLALslv4i16, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VectorIndex1… 13769 …{ 3012 /* vqdmlal */, ARM::VQDMLALslv2i32, Convert__Reg1_2__Tie0_1_1__Reg1_3__Reg1_4__VectorIndex3…
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