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Searched refs:vs35 (Results 1 – 9 of 9) sorted by relevance

/external/llvm-project/llvm/test/CodeGen/PowerPC/
Dneg-abs.ll27 ; CHECK-LE-NEXT: xxlxor vs35, vs35, vs35
39 ; CHECK-LE-NEXT: xxlxor vs35, vs35, vs35
51 ; CHECK-LE-NEXT: xxlxor vs35, vs35, vs35
63 ; CHECK-LE-NEXT: xxlxor vs35, vs35, vs35
Dextract-and-store.ll579 ; CHECK-NEXT: xxswapd vs0, vs35
602 ; CHECK-P9-NEXT: lxvx vs35, 0, r3
608 ; CHECK-P9-NEXT: stxv vs35, 0(r5)
680 ; CHECK-P9-NEXT: stxsibx vs35, 0, r5
682 ; CHECK-P9-NEXT: stxsibx vs35, r5, r3
685 ; CHECK-P9-NEXT: stxsibx vs35, r5, r3
689 ; CHECK-P9-NEXT: stxsibx vs35, r5, r3
698 ; CHECK-P9-BE-NEXT: stxsibx vs35, 0, r5
700 ; CHECK-P9-BE-NEXT: stxsibx vs35, r5, r3
703 ; CHECK-P9-BE-NEXT: stxsibx vs35, r5, r3
[all …]
Dvec-select.ll7 ; CHECK-NEXT: xxsel vs34, vs34, vs35, vs36
20 ; CHECK-NEXT: xxsel vs34, vs34, vs35, vs36
33 ; CHECK-NEXT: xxsel vs34, vs34, vs35, vs36
46 ; CHECK-NEXT: xxsel vs34, vs34, vs35, vs36
61 ; CHECK-NEXT: xxland vs0, vs36, vs35
Dvector-rotates.ll22 ; CHECK-P7-NEXT: lxvw4x vs35, 0, r3
45 ; CHECK-P7-NEXT: lxvw4x vs35, 0, r3
68 ; CHECK-P7-NEXT: lxvw4x vs35, 0, r3
107 ; CHECK-P8-NEXT: xxswapd vs35, vs0
Dlsr-insns-cost.ll18 ; INST-NEXT: lxvd2x vs35, r4, r6
27 ; REG-NEXT: lxvd2x vs35, 0, r4
Dconstant-pool.ll311 ; CHECK-NEXT: plxv vs35, .LCPI15_0@PCREL(0), 1
313 ; CHECK-NEXT: plxv vs35, .LCPI15_1@PCREL(0), 1
315 ; CHECK-NEXT: plxv vs35, .LCPI15_2@PCREL(0), 1
323 ; CHECK-P9-NEXT: lxvx vs35, 0, r3
327 ; CHECK-P9-NEXT: lxvx vs35, 0, r3
331 ; CHECK-P9-NEXT: lxvx vs35, 0, r3
Dfloat-logic-ops.ll59 ; CHECK-NEXT: xxland vs34, vs34, vs35
Dhandle-f16-storage-type.ll678 ; P8-NEXT: xvcvdpsp vs35, vs1
700 ; CHECK-NEXT: xvcvdpsp vs35, vs0
783 ; P8-NEXT: xxmrghd vs35, vs0, vs2
807 ; CHECK-NEXT: xxmrghd vs35, vs1, vs0
1057 ; CHECK-NEXT: xxswapd vs0, vs35
1061 ; CHECK-NEXT: xscvdphp f1, vs35
/external/llvm-project/lldb/source/Plugins/Process/Utility/
DRegisterInfos_ppc64le.h244 DEFINE_VSX(vs35, LLDB_INVALID_REGNUM), \
429 uint32_t vs35[4]; member