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Searched refs:vsri (Results 1 – 25 of 49) sorted by relevance

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/external/llvm/test/MC/ARM/
Dneon-shiftaccum-encoding.s150 vsri.8 d28, d11, #8
151 vsri.16 d26, d12, #16
152 vsri.32 d24, d13, #32
153 vsri.64 d21, d14, #64
154 vsri.8 q1, q8, #8
155 vsri.16 q5, q2, #16
156 vsri.32 q7, q4, #32
157 vsri.64 q9, q6, #64
168 vsri.8 d11, #8
169 vsri.16 d12, #16
[all …]
Dneont2-shiftaccum-encoding.s153 vsri.8 d28, d11, #8
154 vsri.16 d26, d12, #16
155 vsri.32 d24, d13, #32
156 vsri.64 d21, d14, #64
157 vsri.8 q1, q8, #8
158 vsri.16 q5, q2, #16
159 vsri.32 q7, q4, #32
160 vsri.64 q9, q6, #64
171 vsri.8 d11, #8
172 vsri.16 d12, #16
[all …]
Dneon-shift-encoding.s181 vsri.8 d16, d6, #7
182 vsri.16 d26, d18, #15
183 vsri.32 d11, d10, #31
184 vsri.64 d12, d19, #63
185 vsri.8 q1, q8, #7
186 vsri.16 q2, q7, #15
187 vsri.32 q3, q6, #31
188 vsri.64 q4, q5, #63
190 vsri.8 d16, #7
191 vsri.16 d15, #15
[all …]
/external/llvm-project/llvm/test/MC/ARM/
Dneont2-shiftaccum-encoding.s153 vsri.8 d28, d11, #8
154 vsri.16 d26, d12, #16
155 vsri.32 d24, d13, #32
156 vsri.64 d21, d14, #64
157 vsri.8 q1, q8, #8
158 vsri.16 q5, q2, #16
159 vsri.32 q7, q4, #32
160 vsri.64 q9, q6, #64
171 vsri.8 d11, #8
172 vsri.16 d12, #16
[all …]
Dneon-shiftaccum-encoding.s150 vsri.8 d28, d11, #8
151 vsri.16 d26, d12, #16
152 vsri.32 d24, d13, #32
153 vsri.64 d21, d14, #64
154 vsri.8 q1, q8, #8
155 vsri.16 q5, q2, #16
156 vsri.32 q7, q4, #32
157 vsri.64 q9, q6, #64
168 vsri.8 d11, #8
169 vsri.16 d12, #16
[all …]
Dneon-shift-encoding.s181 vsri.8 d16, d6, #7
182 vsri.16 d26, d18, #15
183 vsri.32 d11, d10, #31
184 vsri.64 d12, d19, #63
185 vsri.8 q1, q8, #7
186 vsri.16 q2, q7, #15
187 vsri.32 q3, q6, #31
188 vsri.64 q4, q5, #63
190 vsri.8 d16, #7
191 vsri.16 d15, #15
[all …]
Dmve-shifts.s345 # CHECK: vsri.8 q0, q2, #3 @ encoding: [0x8d,0xff,0x54,0x04]
346 # CHECK-NOFP: vsri.8 q0, q2, #3 @ encoding: [0x8d,0xff,0x54,0x04]
347 vsri.8 q0, q2, #3
350 vsri.8 q0, q2, #9
353 vsri.8 q0, q2, #0
355 # CHECK: vsri.16 q0, q2, #5 @ encoding: [0x9b,0xff,0x54,0x04]
356 # CHECK-NOFP: vsri.16 q0, q2, #5 @ encoding: [0x9b,0xff,0x54,0x04]
357 vsri.16 q0, q2, #5
360 vsri.16 q0, q2, #17
363 vsri.16 q0, q2, #0
[all …]
/external/capstone/suite/MC/ARM/
Dneont2-shiftaccum-encoding.s.cs74 0xc8,0xff,0x1b,0xc4 = vsri.8 d28, d11, #8
75 0xd0,0xff,0x1c,0xa4 = vsri.16 d26, d12, #16
76 0xe0,0xff,0x1d,0x84 = vsri.32 d24, d13, #32
77 0xc0,0xff,0x9e,0x54 = vsri.64 d21, d14, #64
78 0x88,0xff,0x70,0x24 = vsri.8 q1, q8, #8
79 0x90,0xff,0x54,0xa4 = vsri.16 q5, q2, #16
80 0xa0,0xff,0x58,0xe4 = vsri.32 q7, q4, #32
81 0xc0,0xff,0xdc,0x24 = vsri.64 q9, q6, #64
90 0x88,0xff,0x1b,0xb4 = vsri.8 d11, d11, #8
91 0x90,0xff,0x1c,0xc4 = vsri.16 d12, d12, #16
[all …]
Dneon-shiftaccum-encoding.s.cs74 0x1b,0xc4,0xc8,0xf3 = vsri.8 d28, d11, #8
75 0x1c,0xa4,0xd0,0xf3 = vsri.16 d26, d12, #16
76 0x1d,0x84,0xe0,0xf3 = vsri.32 d24, d13, #32
77 0x9e,0x54,0xc0,0xf3 = vsri.64 d21, d14, #64
78 0x70,0x24,0x88,0xf3 = vsri.8 q1, q8, #8
79 0x54,0xa4,0x90,0xf3 = vsri.16 q5, q2, #16
80 0x58,0xe4,0xa0,0xf3 = vsri.32 q7, q4, #32
81 0xdc,0x24,0xc0,0xf3 = vsri.64 q9, q6, #64
90 0x1b,0xb4,0x88,0xf3 = vsri.8 d11, d11, #8
91 0x1c,0xc4,0x90,0xf3 = vsri.16 d12, d12, #16
[all …]
Dneon-shift-encoding.s.cs82 0x16,0x04,0xc9,0xf3 = vsri.8 d16, d6, #7
83 0x32,0xa4,0xd1,0xf3 = vsri.16 d26, d18, #15
84 0x1a,0xb4,0xa1,0xf3 = vsri.32 d11, d10, #31
85 0xb3,0xc4,0x81,0xf3 = vsri.64 d12, d19, #63
86 0x70,0x24,0x89,0xf3 = vsri.8 q1, q8, #7
87 0x5e,0x44,0x91,0xf3 = vsri.16 q2, q7, #15
88 0x5c,0x64,0xa1,0xf3 = vsri.32 q3, q6, #31
89 0xda,0x84,0x81,0xf3 = vsri.64 q4, q5, #63
90 0x30,0x04,0xc9,0xf3 = vsri.8 d16, d16, #7
91 0x1f,0xf4,0x91,0xf3 = vsri.16 d15, d15, #15
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Dvshiftins.ll77 ;CHECK: vsri.8
86 ;CHECK: vsri.16
95 ;CHECK: vsri.32
104 ;CHECK: vsri.64
113 ;CHECK: vsri.8
122 ;CHECK: vsri.16
131 ;CHECK: vsri.32
140 ;CHECK: vsri.64
/external/llvm/test/CodeGen/ARM/
Dvshiftins.ll77 ;CHECK: vsri.8
86 ;CHECK: vsri.16
95 ;CHECK: vsri.32
104 ;CHECK: vsri.64
113 ;CHECK: vsri.8
122 ;CHECK: vsri.16
131 ;CHECK: vsri.32
140 ;CHECK: vsri.64
/external/llvm-project/llvm/test/CodeGen/Thumb2/mve-intrinsics/
Dvector-shift-imm-dyadic.ll1111 ; CHECK-NEXT: vsri.8 q0, q1, #3
1114 %0 = call <16 x i8> @llvm.arm.mve.vsri.v16i8(<16 x i8> %a, <16 x i8> %b, i32 3)
1121 ; CHECK-NEXT: vsri.16 q0, q1, #2
1124 %0 = call <8 x i16> @llvm.arm.mve.vsri.v8i16(<8 x i16> %a, <8 x i16> %b, i32 2)
1131 ; CHECK-NEXT: vsri.32 q0, q1, #28
1134 %0 = call <4 x i32> @llvm.arm.mve.vsri.v4i32(<4 x i32> %a, <4 x i32> %b, i32 28)
1141 ; CHECK-NEXT: vsri.8 q0, q1, #3
1144 %0 = call <16 x i8> @llvm.arm.mve.vsri.v16i8(<16 x i8> %a, <16 x i8> %b, i32 3)
1151 ; CHECK-NEXT: vsri.16 q0, q1, #3
1154 %0 = call <8 x i16> @llvm.arm.mve.vsri.v8i16(<8 x i16> %a, <8 x i16> %b, i32 3)
[all …]
/external/llvm-project/llvm/test/tools/llvm-mca/ARM/
Dcortex-a57-neon-instructions.s585 vsri.8 d16, d16, #7
586 vsri.16 d16, d16, #15
587 vsri.32 d16, d16, #31
588 vsri.64 d16, d16, #63
589 vsri.8 q8, q8, #7
590 vsri.16 q8, q8, #15
591 vsri.32 q8, q8, #31
592 vsri.64 q8, q8, #63
694 vsri.8 d17, d16, #8
695 vsri.16 d17, d16, #16
[all …]
/external/arm-neon-tests/
Dref_vsri_n.c26 #define INSN_NAME vsri
/external/rust/crates/grpcio-sys/grpc/third_party/re2/
DCONTRIBUTORS40 Srinivasan Venkatachary <vsri@google.com>
/external/llvm/test/MC/Disassembler/ARM/
Dneon-tests.txt54 # CHECK: vsri.32 q15, q0, #1
Dneon.txt1229 # CHECK: vsri.8 d16, d16, #7
1231 # CHECK: vsri.16 d16, d16, #15
1233 # CHECK: vsri.32 d16, d16, #31
1235 # CHECK: vsri.64 d16, d16, #63
1237 # CHECK: vsri.8 q8, q8, #7
1239 # CHECK: vsri.16 q8, q8, #15
1241 # CHECK: vsri.32 q8, q8, #31
1243 # CHECK: vsri.64 q8, q8, #63
1449 # CHECK: vsri.8 d17, d16, #8
1451 # CHECK: vsri.16 d17, d16, #16
[all …]
Dneont2.txt1258 # CHECK: vsri.8 d17, d16, #8
1260 # CHECK: vsri.16 d17, d16, #16
1262 # CHECK: vsri.32 d17, d16, #32
1264 # CHECK: vsri.64 d17, d16, #64
1266 # CHECK: vsri.8 q9, q8, #8
1268 # CHECK: vsri.16 q9, q8, #16
1270 # CHECK: vsri.32 q9, q8, #32
1272 # CHECK: vsri.64 q9, q8, #64
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dneon-tests.txt57 # CHECK: vsri.32 q15, q0, #1
Dneon.txt1238 # CHECK: vsri.8 d16, d16, #7
1240 # CHECK: vsri.16 d16, d16, #15
1242 # CHECK: vsri.32 d16, d16, #31
1244 # CHECK: vsri.64 d16, d16, #63
1246 # CHECK: vsri.8 q8, q8, #7
1248 # CHECK: vsri.16 q8, q8, #15
1250 # CHECK: vsri.32 q8, q8, #31
1252 # CHECK: vsri.64 q8, q8, #63
1458 # CHECK: vsri.8 d17, d16, #8
1460 # CHECK: vsri.16 d17, d16, #16
[all …]
Dmve-shifts.txt281 # CHECK: vsri.8 q0, q2, #3 @ encoding: [0x8d,0xff,0x54,0x04]
285 # CHECK: vsri.16 q0, q2, #5 @ encoding: [0x9b,0xff,0x54,0x04]
289 # CHECK: vsri.32 q0, q1, #15 @ encoding: [0xb1,0xff,0x52,0x04]
Dneont2.txt1268 # CHECK: vsri.8 d17, d16, #8
1270 # CHECK: vsri.16 d17, d16, #16
1272 # CHECK: vsri.32 d17, d16, #32
1274 # CHECK: vsri.64 d17, d16, #64
1276 # CHECK: vsri.8 q9, q8, #8
1278 # CHECK: vsri.16 q9, q8, #16
1280 # CHECK: vsri.32 q9, q8, #32
1282 # CHECK: vsri.64 q9, q8, #64
/external/rust/crates/quiche/deps/boringssl/linux-arm/crypto/fipsmodule/
Dsha1-armv4-large.S576 vsri.32 q8,q12,#31
623 vsri.32 q9,q12,#31
669 vsri.32 q10,q12,#31
715 vsri.32 q11,q12,#31
/external/boringssl/linux-arm/crypto/fipsmodule/
Dsha1-armv4-large.S576 vsri.32 q8,q12,#31
623 vsri.32 q9,q12,#31
669 vsri.32 q10,q12,#31
715 vsri.32 q11,q12,#31

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