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/external/libhevc/common/arm/
Dihevc_padding.s122 vst1.8 {d0,d1},[r4]! @128/8 = 16 bytes store
123 vst1.8 {d0,d1},[r4]! @ 16 bytes store
124 vst1.8 {d0,d1},[r4]! @ 16 bytes store
125 vst1.8 {d0,d1},[r4]! @ 16 bytes store
126 vst1.8 {d0,d1},[r4] @ 16 bytes store
130 vst1.8 {d2,d3},[r5]! @128/8 = 16 bytes store
131 vst1.8 {d2,d3},[r5]! @128/8 = 16 bytes store
132 vst1.8 {d2,d3},[r5]! @128/8 = 16 bytes store
133 vst1.8 {d2,d3},[r5]! @128/8 = 16 bytes store
134 vst1.8 {d2,d3},[r5] @128/8 = 16 bytes store
[all …]
Dihevc_intra_pred_chroma_horz.s130 vst1.16 {q1},[r2],r3 @store in 1st row 0-16 columns
131 vst1.16 {q1},[r9],r3 @store in 1st row 16-32 columns
134 vst1.16 {q2},[r2],r3
135 vst1.16 {q2},[r9],r3
138 vst1.16 {q3},[r2],r3
139 vst1.16 {q3},[r9],r3
142 vst1.16 {q4},[r2],r3
143 vst1.16 {q4},[r9],r3
146 vst1.16 {q1},[r2],r3
147 vst1.16 {q1},[r9],r3
[all …]
Dihevc_intra_pred_luma_horz.s126 vst1.8 {q1},[r2],r3 @store in 1st row 0-16 columns
127 vst1.8 {q1},[r9],r3 @store in 1st row 16-32 columns
130 vst1.8 {q2},[r2],r3
131 vst1.8 {q2},[r9],r3
134 vst1.8 {q3},[r2],r3
135 vst1.8 {q3},[r9],r3
138 vst1.8 {q4},[r2],r3
139 vst1.8 {q4},[r9],r3
142 vst1.8 {q1},[r2],r3
143 vst1.8 {q1},[r9],r3
[all …]
Dihevc_intra_pred_luma_vert.s128 vst1.8 {d20,d21}, [r2]!
129 vst1.8 {d20,d21}, [r5]!
130 vst1.8 {d20,d21}, [r8]!
131 vst1.8 {d20,d21}, [r10]!
133 vst1.8 {d22,d23}, [r2], r11
134 vst1.8 {d22,d23}, [r5], r11
135 vst1.8 {d22,d23}, [r8], r11
136 vst1.8 {d22,d23}, [r10], r11
141 vst1.8 {d20,d21}, [r2]!
142 vst1.8 {d20,d21}, [r5]!
[all …]
Dihevc_intra_pred_luma_mode_18_34.s160 vst1.8 {d0},[r10],r3
161 vst1.8 {d1},[r10],r3
163 vst1.8 {d2},[r10],r3
165 vst1.8 {d3},[r10],r3
168 vst1.8 {d4},[r10],r3
170 vst1.8 {d5},[r10],r3
172 vst1.8 {d6},[r10],r3
174 vst1.8 {d7},[r10],r3
198 vst1.8 {d0},[r10],r3
199 vst1.8 {d1},[r10],r3
[all …]
Dihevc_intra_pred_luma_mode2.s164 vst1.8 {d8},[r6],r5
165 vst1.8 {d9},[r7],r5
168 vst1.8 {d10},[r9],r5
171 vst1.8 {d11},[r14],r5
172 vst1.8 {d12},[r6],r5
175 vst1.8 {d13},[r7],r5
176 vst1.8 {d14},[r9],r5
179 vst1.8 {d15},[r14],r5
227 vst1.8 {d8},[r6],r5
228 vst1.8 {d9},[r7],r5
[all …]
Dihevc_intra_pred_chroma_mode_18_34.s138 vst1.8 {d0,d1},[r10],r3
140 vst1.8 {d2,d3},[r10],r3
142 vst1.8 {d4,d5},[r10],r3
144 vst1.8 {d6,d7},[r10],r3
146 vst1.8 {d8,d9},[r10],r3
148 vst1.8 {d10,d11},[r10],r3
150 vst1.8 {d12,d13},[r10],r3
152 vst1.8 {d14,d15},[r10],r3
175 vst1.32 {d0},[r2],r3
178 vst1.32 {d0},[r2],r3
[all …]
/external/libvpx/libvpx/vpx_dsp/arm/
Dintrapred_neon_asm.asm39 vst1.32 {d0[0]}, [r0], r1
40 vst1.32 {d0[0]}, [r0], r1
41 vst1.32 {d0[0]}, [r0], r1
42 vst1.32 {d0[0]}, [r0], r1
56 vst1.8 {d0}, [r0], r1
57 vst1.8 {d0}, [r0], r1
58 vst1.8 {d0}, [r0], r1
59 vst1.8 {d0}, [r0], r1
60 vst1.8 {d0}, [r0], r1
61 vst1.8 {d0}, [r0], r1
[all …]
/external/libvpx/config/arm-neon/vpx_dsp/arm/
Dintrapred_neon_asm.asm.S56 vst1.32 {d0[0]}, [r0], r1
57 vst1.32 {d0[0]}, [r0], r1
58 vst1.32 {d0[0]}, [r0], r1
59 vst1.32 {d0[0]}, [r0], r1
74 vst1.8 {d0}, [r0], r1
75 vst1.8 {d0}, [r0], r1
76 vst1.8 {d0}, [r0], r1
77 vst1.8 {d0}, [r0], r1
78 vst1.8 {d0}, [r0], r1
79 vst1.8 {d0}, [r0], r1
[all …]
/external/libavc/common/arm/
Dih264_padding_neon.s101 vst1.8 {d0, d1}, [r4], r6
180 vst1.8 {q0}, [r4], r1 @ 16 bytes store
182 vst1.8 {q1}, [r4], r1 @ 16 bytes store
186 vst1.8 {q2}, [r4], r1 @ 16 bytes store
188 vst1.8 {q3}, [r4], r1 @ 16 bytes store
192 vst1.8 {q0}, [r4], r1 @ 16 bytes store
195 vst1.8 {q1}, [r4], r1 @ 16 bytes store
199 vst1.8 {q2}, [r4], r1 @ 16 bytes store
200 vst1.8 {q3}, [r4], r1 @ 16 bytes store
209 vst1.8 {q0}, [r4]! @ 16 bytes store
[all …]
Dih264_intra_pred_luma_8x8_a9q.s123 vst1.8 {d14[0]}, [r1]!
131 vst1.8 {q2}, [r1]!
133 vst1.8 {d6}, [r1]
201 vst1.8 d0, [r1], r3
202 vst1.8 d0, [r1], r3
203 vst1.8 d0, [r1], r3
204 vst1.8 d0, [r1], r3
205 vst1.8 d0, [r1], r3
206 vst1.8 d0, [r1], r3
207 vst1.8 d0, [r1], r3
[all …]
Dih264_intra_pred_luma_4x4_a9q.s113 vst1.32 d0[0], [r1], r3
114 vst1.32 d0[0], [r1], r3
115 vst1.32 d0[0], [r1], r3
116 vst1.32 d0[0], [r1], r3
189 vst1.32 d0[0], [r1], r3
192 vst1.32 d1[0], [r1], r3
195 vst1.32 d2[0], [r1], r3
197 vst1.32 d3[0], [r1], r3
294 vst1.32 d0[0], [r1], r3
295 vst1.32 d0[0], [r1], r3
[all …]
Dih264_intra_pred_luma_16x16_a9q.s115 vst1.8 {q0}, [r1], r3
116 vst1.8 {q0}, [r1], r3
117 vst1.8 {q0}, [r1], r3
118 vst1.8 {q0}, [r1], r3
119 vst1.8 {q0}, [r1], r3
120 vst1.8 {q0}, [r1], r3
121 vst1.8 {q0}, [r1], r3
122 vst1.8 {q0}, [r1], r3
123 vst1.8 {q0}, [r1], r3
124 vst1.8 {q0}, [r1], r3
[all …]
Dih264_inter_pred_luma_bilinear_a9q.s155 vst1.8 {q14}, [r2], r5 @//Store dest row0
157 vst1.8 {q15}, [r2], r5 @//Store dest row1
167 vst1.8 {q14}, [r2], r5 @//Store dest row2
169 vst1.8 {q15}, [r2], r5 @//Store dest row3
183 vst1.8 {q14}, [r2], r5 @//Store dest row4
185 vst1.8 {q15}, [r2], r5 @//Store dest row5
191 vst1.8 {q14}, [r2], r5 @//Store dest row6
193 vst1.8 {q15}, [r2], r5 @//Store dest row7
214 vst1.8 {q14}, [r2], r5 @//Store dest row8
216 vst1.8 {q15}, [r2], r5 @//Store dest row9
[all …]
/external/libmpeg2/common/arm/
Dimpeg2_mem_func.s105 vst1.8 {d0}, [r0], r2 @//Store the row 1
106 vst1.8 {d0}, [r0], r2 @//Store the row 2
107 vst1.8 {d0}, [r0], r2 @//Store the row 3
108 vst1.8 {d0}, [r0], r2 @//Store the row 4
109 vst1.8 {d0}, [r0], r2 @//Store the row 5
110 vst1.8 {d0}, [r0], r2 @//Store the row 6
111 vst1.8 {d0}, [r0], r2 @//Store the row 7
112 vst1.8 {d0}, [r0], r2 @//Store the row 8
155 vst1.16 {d0, d1} , [r0]! @row1
157 vst1.16 {d0, d1} , [r0]! @row2
[all …]
Dimpeg2_inter_pred.s110 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
114 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
116 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
118 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
120 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
122 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
124 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
126 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
128 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
130 vst1.8 {d0, d1}, [r5], r3 @Store and increment dst
[all …]
/external/llvm/test/MC/Disassembler/ARM/
Dneont-VST-reencoding.txt12 # CHECK: vst1.8 {d0[0]}, [r0], r0 @ encoding: [0x80,0xf9,0x00,0x00]
13 # CHECK: vst1.8 {d1[1]}, [r1], r1 @ encoding: [0x81,0xf9,0x21,0x10]
14 # CHECK: vst1.8 {d1[2]}, [r1], r2 @ encoding: [0x81,0xf9,0x42,0x10]
15 # CHECK: vst1.8 {d2[3]}, [r1], r1 @ encoding: [0x81,0xf9,0x61,0x20]
16 # CHECK: vst1.8 {d2[4]}, [r2], r2 @ encoding: [0x82,0xf9,0x82,0x20]
17 # CHECK: vst1.8 {d1[5]}, [r2], r1 @ encoding: [0x82,0xf9,0xa1,0x10]
18 # CHECK: vst1.8 {d2[6]}, [r2], r2 @ encoding: [0x82,0xf9,0xc2,0x20]
19 # CHECK: vst1.8 {d3[7]}, [r3], r3 @ encoding: [0x83,0xf9,0xe3,0x30]
30 # CHECK: vst1.16 {d0[0]}, [r0], r0 @ encoding: [0x80,0xf9,0x00,0x04]
31 # CHECK: vst1.16 {d16[0]}, [r3:16], r3 @ encoding: [0xc3,0xf9,0x13,0x04]
[all …]
/external/llvm-project/llvm/test/MC/Disassembler/ARM/
Dneont-VST-reencoding.txt12 # CHECK: vst1.8 {d0[0]}, [r0], r0 @ encoding: [0x80,0xf9,0x00,0x00]
13 # CHECK: vst1.8 {d1[1]}, [r1], r1 @ encoding: [0x81,0xf9,0x21,0x10]
14 # CHECK: vst1.8 {d1[2]}, [r1], r2 @ encoding: [0x81,0xf9,0x42,0x10]
15 # CHECK: vst1.8 {d2[3]}, [r1], r1 @ encoding: [0x81,0xf9,0x61,0x20]
16 # CHECK: vst1.8 {d2[4]}, [r2], r2 @ encoding: [0x82,0xf9,0x82,0x20]
17 # CHECK: vst1.8 {d1[5]}, [r2], r1 @ encoding: [0x82,0xf9,0xa1,0x10]
18 # CHECK: vst1.8 {d2[6]}, [r2], r2 @ encoding: [0x82,0xf9,0xc2,0x20]
19 # CHECK: vst1.8 {d3[7]}, [r3], r3 @ encoding: [0x83,0xf9,0xe3,0x30]
30 # CHECK: vst1.16 {d0[0]}, [r0], r0 @ encoding: [0x80,0xf9,0x00,0x04]
31 # CHECK: vst1.16 {d16[0]}, [r3:16], r3 @ encoding: [0xc3,0xf9,0x13,0x04]
[all …]
/external/llvm/test/CodeGen/ARM/
Dvst1.ll6 ;CHECK: vst1.8 {d16}, [r0:64]
8 call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %A, <8 x i8> %tmp1, i32 16)
14 ;CHECK: vst1.16
17 call void @llvm.arm.neon.vst1.p0i8.v4i16(i8* %tmp0, <4 x i16> %tmp1, i32 1)
23 ;CHECK: vst1.32
26 call void @llvm.arm.neon.vst1.p0i8.v2i32(i8* %tmp0, <2 x i32> %tmp1, i32 1)
32 ;CHECK: vst1.32
35 call void @llvm.arm.neon.vst1.p0i8.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1)
42 ;CHECK: vst1.32 {d16}, [r1]!
46 call void @llvm.arm.neon.vst1.p0i8.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1)
[all …]
Dalloc-no-stack-realign.ll21 ; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128]
23 ; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128]
24 ; NO-REALIGN: vst1.32 {{{d[0-9]+, d[0-9]+}}}, [r[[R1]]:128]!
25 ; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R1]]:128]
28 ; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128]
30 ; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128]
31 ; NO-REALIGN: vst1.32 {{{d[0-9]+, d[0-9]+}}}, [r[[R0]]:128]!
32 ; NO-REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R0]]:128]
55 ; REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128]
57 ; REALIGN: vst1.64 {{{d[0-9]+, d[0-9]+}}}, [r[[R2]]:128]
[all …]
/external/llvm-project/llvm/test/CodeGen/ARM/
Dvst1.ll6 ;CHECK: vst1.8 {d16}, [r0:64]
8 call void @llvm.arm.neon.vst1.p0i8.v8i8(i8* %A, <8 x i8> %tmp1, i32 16)
14 ;CHECK: vst1.16
17 call void @llvm.arm.neon.vst1.p0i8.v4i16(i8* %tmp0, <4 x i16> %tmp1, i32 1)
23 ;CHECK: vst1.32
26 call void @llvm.arm.neon.vst1.p0i8.v2i32(i8* %tmp0, <2 x i32> %tmp1, i32 1)
32 ;CHECK: vst1.32
35 call void @llvm.arm.neon.vst1.p0i8.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1)
42 ;CHECK: vst1.32 {d16}, [r{{[0-9]+}}]!
46 call void @llvm.arm.neon.vst1.p0i8.v2f32(i8* %tmp0, <2 x float> %tmp1, i32 1)
[all …]
/external/libavc/encoder/arm/
Dih264e_evaluate_intra16x16_modes_a9q.s247 vst1.32 {d10, d11} , [r2], r4 @0
251 vst1.32 {d12, d13} , [r2], r4 @1
253 vst1.32 {d14, d15} , [r2], r4 @2
255 vst1.32 {d16, d17} , [r2], r4 @3
257 vst1.32 {d18, d19} , [r2], r4 @4
259 vst1.32 {d20, d21} , [r2], r4 @5
261 vst1.32 {d22, d23} , [r2], r4 @6
263 vst1.32 {d24, d25} , [r2], r4 @7
265 vst1.32 {d26, d27} , [r2], r4 @8
267 vst1.32 {d28, d29} , [r2], r4 @9
[all …]
/external/capstone/suite/MC/ARM/
Dneon-vst-encoding.s.cs2 0x1f,0x07,0x40,0xf4 = vst1.8 {d16}, [r0:64]
3 0x4f,0x07,0x40,0xf4 = vst1.16 {d16}, [r0]
4 0x8f,0x07,0x40,0xf4 = vst1.32 {d16}, [r0]
5 0xcf,0x07,0x40,0xf4 = vst1.64 {d16}, [r0]
6 0x1f,0x0a,0x40,0xf4 = vst1.8 {d16, d17}, [r0:64]
7 0x6f,0x0a,0x40,0xf4 = vst1.16 {d16, d17}, [r0:128]
8 0x8f,0x0a,0x40,0xf4 = vst1.32 {d16, d17}, [r0]
9 0xcf,0x0a,0x40,0xf4 = vst1.64 {d16, d17}, [r0]
10 0x1f,0x06,0x40,0xf4 = vst1.8 {d16, d17, d18}, [r0:64]
11 0x1d,0x06,0x40,0xf4 = vst1.8 {d16, d17, d18}, [r0:64]!
[all …]
/external/llvm-project/llvm/test/MC/ARM/
Dneon-vst-encoding.s3 vst1.8 {d16}, [r0:64]
4 vst1.16 {d16}, [r0]
5 vst1.32 {d16}, [r0]
6 vst1.64 {d16}, [r0]
7 vst1.8 {d16, d17}, [r0:64]
8 vst1.16 {d16, d17}, [r0:128]
9 vst1.32 {d16, d17}, [r0]
10 vst1.64 {d16, d17}, [r0]
11 vst1.8 {d16, d17, d18}, [r0:64]
12 vst1.8 {d16, d17, d18}, [r0:64]!
[all …]
/external/llvm/test/MC/ARM/
Dneon-vst-encoding.s3 vst1.8 {d16}, [r0:64]
4 vst1.16 {d16}, [r0]
5 vst1.32 {d16}, [r0]
6 vst1.64 {d16}, [r0]
7 vst1.8 {d16, d17}, [r0:64]
8 vst1.16 {d16, d17}, [r0:128]
9 vst1.32 {d16, d17}, [r0]
10 vst1.64 {d16, d17}, [r0]
11 vst1.8 {d16, d17, d18}, [r0:64]
12 vst1.8 {d16, d17, d18}, [r0:64]!
[all …]

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