| /external/llvm-project/llvm/lib/Target/X86/Disassembler/ |
| D | X86Disassembler.cpp | 845 insn->vvvv = in fixupReg()
846 (Reg)fixupRegValue(insn, (OperandType)op->type, insn->vvvv, &valid); in fixupReg()
1445 int vvvv; in readVVVV() local
1447 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 | in readVVVV()
1450 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1452 vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]); in readVVVV()
1454 vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1459 vvvv &= 0xf; // Can only clear bit 4. Bit 3 must be cleared later. in readVVVV()
1461 insn->vvvv = static_cast<Reg>(vvvv); in readVVVV()
1490 needVVVV = hasVVVV && (insn->vvvv != 0); in readOperands()
[all …]
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| D | X86DisassemblerDecoder.h | 594 Reg vvvv; member
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/Disassembler/ |
| D | X86Disassembler.cpp | 841 insn->vvvv = in fixupReg()
842 (Reg)fixupRegValue(insn, (OperandType)op->type, insn->vvvv, &valid); in fixupReg()
1440 int vvvv; in readVVVV() local
1442 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 | in readVVVV()
1445 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1447 vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]); in readVVVV()
1449 vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1454 vvvv &= 0xf; // Can only clear bit 4. Bit 3 must be cleared later. in readVVVV()
1456 insn->vvvv = static_cast<Reg>(vvvv); in readVVVV()
1485 needVVVV = hasVVVV && (insn->vvvv != 0); in readOperands()
[all …]
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| D | X86DisassemblerDecoder.h | 585 Reg vvvv; member
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| /external/swiftshader/src/Shader/ |
| D | SamplerCore.cpp | 95 Float4 vvvv = v; in sampleTexture() local
109 computeLod(texture, lod, anisotropy, uDelta, vDelta, uuuu, vvvv, bias.x, dsx, dsy, function); in sampleTexture()
114 cubeFace(face, uuuu, vvvv, u, v, w, M); in sampleTexture()
120 computeLod3D(texture, lod, uuuu, vvvv, wwww, bias.x, dsx, dsy, function); in sampleTexture()
125 …c = sampleFilter(texture, uuuu, vvvv, wwww, offset, lod, anisotropy, uDelta, vDelta, face, functio… in sampleTexture()
129 …Vector4f cf = sampleFloatFilter(texture, uuuu, vvvv, wwww, qqqq, offset, lod, anisotropy, uDelta, … in sampleTexture()
304 Float4 vvvv = v; in sampleTexture() local
318 computeLod(texture, lod, anisotropy, uDelta, vDelta, uuuu, vvvv, bias.x, dsx, dsy, function); in sampleTexture()
323 cubeFace(face, uuuu, vvvv, u, v, w, M); in sampleTexture()
329 computeLod3D(texture, lod, uuuu, vvvv, wwww, bias.x, dsx, dsy, function); in sampleTexture()
[all …]
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| D | SamplerCore.hpp | 80 …void computeIndices(UInt index[4], Short4 uuuu, Short4 vvvv, Short4 wwww, Vector4f &offset, const …
81 …void computeIndices(UInt index[4], Int4& uuuu, Int4& vvvv, Int4& wwww, const Pointer<Byte> &mipmap…
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| /external/llvm/lib/Target/X86/Disassembler/ |
| D | X86DisassemblerDecoder.cpp | 1549 insn->vvvv = (Reg)fixupRegValue(insn, in fixupReg()
1551 insn->vvvv, in fixupReg()
1694 int vvvv; in readVVVV() local
1696 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 | in readVVVV()
1699 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1701 vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]); in readVVVV()
1703 vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1708 vvvv &= 0x7; in readVVVV()
1710 insn->vvvv = static_cast<Reg>(vvvv); in readVVVV()
1748 needVVVV = hasVVVV && (insn->vvvv != 0); in readOperands()
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| D | X86DisassemblerDecoder.h | 598 Reg vvvv; member
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| D | X86Disassembler.cpp | 1013 translateRegister(mcInst, insn.vvvv); in translateOperand()
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| /external/capstone/arch/X86/ |
| D | X86DisassemblerDecoder.c | 1822 insn->vvvv = (Reg)fixupRegValue(insn, in fixupReg()
1824 insn->vvvv, in fixupReg()
1970 int vvvv; in readVVVV() local
1974 vvvv = (v2FromEVEX4of4(insn->vectorExtensionPrefix[3]) << 4 | in readVVVV()
1977 vvvv = vvvvFromVEX3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1979 vvvv = vvvvFromVEX2of2(insn->vectorExtensionPrefix[1]); in readVVVV()
1981 vvvv = vvvvFromXOP3of3(insn->vectorExtensionPrefix[2]); in readVVVV()
1986 vvvv &= 0x7; in readVVVV()
1988 insn->vvvv = vvvv; in readVVVV()
2029 needVVVV = hasVVVV && (insn->vvvv != 0); in readOperands()
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| D | X86DisassemblerDecoder.h | 680 Reg vvvv; member
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| D | X86Disassembler.c | 802 translateRegister(mcInst, insn->vvvv); in translateOperand()
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| /external/swiftshader/src/Pipeline/ |
| D | SamplerCore.cpp | 539 Short4 vvvv = address(v, state.addressingModeV, mipmap); in sampleQuad2D() local
545 c = sampleTexel(uuuu, vvvv, wwww, layerIndex, offset, sample, mipmap, buffer, function); in sampleQuad2D()
550 …Short4 vvvv0 = offsetSample(vvvv, mipmap, OFFSET(Mipmap, vHalf), state.addressingModeV == ADDRESSI… in sampleQuad2D()
552 …Short4 vvvv1 = offsetSample(vvvv, mipmap, OFFSET(Mipmap, vHalf), state.addressingModeV == ADDRESSI… in sampleQuad2D()
741 Short4 vvvv = address(v_, state.addressingModeV, mipmap); in sample3D() local
746 c_ = sampleTexel(uuuu, vvvv, wwww, 0, offset, sample, mipmap, buffer, function); in sample3D()
763 …v[i][j][k] = offsetSample(vvvv, mipmap, OFFSET(Mipmap, vHalf), state.addressingModeV == ADDRESSING… in sample3D()
1192 … Float &anisotropy, Float4 &uDelta, Float4 &vDelta, Float4 &uuuu, Float4 &vvvv, Float4 &dsx, Float… in computeLod2D() argument
1198 duvdxy = Float4(uuuu.yz, vvvv.yz) - Float4(uuuu.xx, vvvv.xx); in computeLod2D()
1279 void SamplerCore::computeLod3D(Pointer<Byte> &texture, Float &lod, Float4 &uuuu, Float4 &vvvv, Floa… in computeLod3D() argument
[all …]
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| D | SamplerCore.hpp | 82 …void computeIndices(UInt index[4], Short4 uuuu, Short4 vvvv, Short4 wwww, const Short4 &cubeArrayL…
83 …void computeIndices(UInt index[4], Int4 uuuu, Int4 vvvv, Int4 wwww, const Int4 &sample, Int4 valid…
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| /external/llvm-project/llvm/test/MC/Disassembler/X86/ |
| D | invalid-VEX-vvvv-32.txt | 3 # Make sure the VEX.vvvv being all 1s check doesn't ignore bit 3 in 32-bit mode.
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| D | invalid-VEX-vvvv.txt | 3 # This instruction would decode as movmskps if the vvvv field in the VEX prefix was all 1s.
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| /external/llvm/test/MC/Disassembler/X86/ |
| D | invalid-VEX-vvvv.txt | 3 # This instruction would decode as movmskps if the vvvv field in the VEX prefix was all 1s.
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| /external/icu/icu4c/source/data/locales/ |
| D | es_AR.txt | 30 Hmsvvvv{"HH:mm:ss (vvvv)"}
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| D | es_US.txt | 146 Hmsvvvv{"HH:mm:ss (vvvv)"}
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| D | ca.txt | 601 Hmsvvvv{"H:mm:ss (vvvv)"}
603 Hmvvvv{"H:mm (vvvv)"}
621 hmsvvvv{"h:mm:ss a (vvvv)"}
623 hmvvvv{"h:mm a (vvvv)"}
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| D | es_MX.txt | 167 Hmsvvvv{"HH:mm:ss (vvvv)"}
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| D | es.txt | 756 Hmsvvvv{"H:mm:ss (vvvv)"}
777 hmsvvvv{"h:mm:ss a (vvvv)"}
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| /external/cldr/tools/java/org/unicode/cldr/util/ |
| D | VerifyZones.java | 80 …private final static List<Format> FORMAT_LIST = Arrays.asList(Format.VVVV, Format.vvvv, Format.v, …
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| D | TimezoneFormatter.java | 86 …VVVV(Type.GENERIC, Location.LOCATION, Length.OTHER), vvvv(Type.GENERIC, Location.NON_LOCATION, Len… enumConstant
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| /external/tcpdump/tests/ |
| D | TESTLIST | 197 of10_s4810-vvvv of10_s4810.pcap of10_s4810-vvvv.out -vvvv
|