| /external/llvm-project/llvm/test/CodeGen/AArch64/ |
| D | srem-vector-lkk.ll | 26 ; CHECK-NEXT: mov w10, #-124
29 ; CHECK-NEXT: msub w8, w9, w10, w8
32 ; CHECK-NEXT: add w10, w10, w12
33 ; CHECK-NEXT: asr w13, w10, #6
35 ; CHECK-NEXT: add w10, w13, w10, lsr #31
36 ; CHECK-NEXT: msub w9, w10, w9, w12
37 ; CHECK-NEXT: mov w10, #63249
39 ; CHECK-NEXT: movk w10, #48808, lsl #16
40 ; CHECK-NEXT: smull x10, w13, w10
44 ; CHECK-NEXT: add w10, w10, w12
[all …]
|
| D | urem-vector-lkk.ll | 9 ; CHECK-NEXT: umov w10, v0.h[2]
11 ; CHECK-NEXT: umull x11, w10, w11
17 ; CHECK-NEXT: msub w10, w11, w12, w10
41 ; CHECK-NEXT: mov v0.h[2], w10
57 ; CHECK-NEXT: umov w10, v0.h[0]
60 ; CHECK-NEXT: umull x14, w10, w9
69 ; CHECK-NEXT: sub w16, w10, w14
80 ; CHECK-NEXT: msub w10, w13, w16, w10
82 ; CHECK-NEXT: fmov s0, w10
104 ; CHECK-NEXT: umov w10, v0.h[0]
[all …]
|
| D | machine-outliner-retaddr-sign-regsave.mir | 95 $w10 = ORRWri $wzr, 1
96 $w10 = ORRWri $wzr, 1
97 $w10 = ORRWri $wzr, 1
98 $w10 = ORRWri $wzr, 1
99 $w10 = ORRWri $wzr, 1
103 $w10 = ORRWri $wzr, 1
104 $w10 = ORRWri $wzr, 1
105 $w10 = ORRWri $wzr, 1
106 $w10 = ORRWri $wzr, 1
107 $w10 = ORRWri $wzr, 1
[all …]
|
| D | machine-outliner-regsave.mir | 105 $w10 = ORRWri $wzr, 1
106 $w10 = ORRWri $wzr, 1
107 $w10 = ORRWri $wzr, 1
108 $w10 = ORRWri $wzr, 1
109 $w10 = ORRWri $wzr, 1
113 $w10 = ORRWri $wzr, 1
114 $w10 = ORRWri $wzr, 1
115 $w10 = ORRWri $wzr, 1
116 $w10 = ORRWri $wzr, 1
117 $w10 = ORRWri $wzr, 1
[all …]
|
| D | midpoint-int.ll | 18 ; CHECK-NEXT: csel w10, w0, w1, gt
20 ; CHECK-NEXT: sub w9, w10, w9
41 ; CHECK-NEXT: csel w10, w0, w1, hi
43 ; CHECK-NEXT: sub w9, w10, w9
67 ; CHECK-NEXT: csel w10, w1, w8, gt
69 ; CHECK-NEXT: sub w10, w11, w10
71 ; CHECK-NEXT: lsr w10, w10, #1
72 ; CHECK-NEXT: madd w0, w10, w9, w8
92 ; CHECK-NEXT: csel w10, w8, w0, gt
94 ; CHECK-NEXT: sub w8, w8, w10
[all …]
|
| D | arm64-fast-isel-intrinsic.ll | 88 ; ARM64: ldr w10, {{\[}}[[REG2]]]
89 ; ARM64: str w10, {{\[}}[[REG0]]]
90 ; ARM64: ldr w10, {{\[}}[[REG2]], #4]
91 ; ARM64: str w10, {{\[}}[[REG0]], #4]
105 ; ARM64: ldrh w10, {{\[}}[[REG2]]]
106 ; ARM64: strh w10, {{\[}}[[REG0]]]
107 ; ARM64: ldrh w10, {{\[}}[[REG2]], #2]
108 ; ARM64: strh w10, {{\[}}[[REG0]], #2]
109 ; ARM64: ldrh w10, {{\[}}[[REG2]], #4]
110 ; ARM64: strh w10, {{\[}}[[REG0]], #4]
[all …]
|
| /external/libxaac/decoder/armv8/ |
| D | ixheaacd_postradixcompute4.s | 48 LDP w9, w10, [x1], #8 // x_4 :x_5
54 ADD w9, w6, w10 // xh1_0 = x_1 + x_5
55 SUB w6, w6, w10 // xl1_0 = x_1 - x_5
57 ADD w10, w7, w11 // xh0_1 = x_2 + x_6
63 ADD w12, w14, w10 // n00 = xh0_0 + xh0_1
64 SUB w14, w14, w10 // n20 = xh0_0 - xh0_1
66 ADD w10, w9, w11 // n01 = xh1_0 + xh1_1
78 STR w10, [x0], #14<<1 // y0[h2 + 1] = n01, x7 -> y1[h2]
93 LDP w9, w10, [x4], #8 // x_c :x_d
102 ADD w9, w6, w10
[all …]
|
| D | ixheaacd_fft32x32_ld2_armv8.s | 61 ADD w10, w2, w4 //xh1_0 = x_1 + x_5
75 ADD w2, w10, w12 //n01 = xh1_0 + xh1_1
77 SUB w4, w10, w12 //n21 = xh1_0 - xh1_1
106 ADD w10, w2, w4 //xh1_0 = x_1 + x_5
120 ADD w2, w10, w12 //n01 = xh1_0 + xh1_1
122 SUB w4, w10, w12 //n21 = xh1_0 - xh1_1
151 ADD w10, w2, w4 //xh1_0 = x_1 + x_5
165 ADD w2, w10, w12 //n01 = xh1_0 + xh1_1
167 SUB w4, w10, w12 //n21 = xh1_0 - xh1_1
196 ADD w10, w2, w4 //xh1_0 = x_1 + x_5
[all …]
|
| /external/llvm/test/CodeGen/AArch64/ |
| D | arm64-fast-isel-intrinsic.ll | 88 ; ARM64: ldr w10, [x9]
89 ; ARM64: str w10, [x8]
90 ; ARM64: ldr w10, [x9, #4]
91 ; ARM64: str w10, [x8, #4]
92 ; ARM64: ldrb w10, [x9, #8]
93 ; ARM64: strb w10, [x8, #8]
105 ; ARM64: ldrh w10, [x9]
106 ; ARM64: strh w10, [x8]
107 ; ARM64: ldrh w10, [x9, #2]
108 ; ARM64: strh w10, [x8, #2]
[all …]
|
| /external/libavc/common/armv8/ |
| D | ih264_padding_neon_av8.s | 190 ldrb w10, [x0]
197 dup v4.16b, w10
206 ldrb w10, [x0]
213 dup v4.16b, w10
227 ldrb w10, [x0]
233 dup v4.16b, w10
247 ldrb w10, [x0]
255 dup v4.16b, w10
348 ldrh w10, [x0]
356 dup v4.8h, w10
[all …]
|
| /external/llvm/test/MC/Mips/msa/ |
| D | test_3rf.s | 15 # CHECK: fcor.w $w10, $w18, $w25 # encoding: [0x78,0x59,0x92,0x9c]
32 # CHECK: fexp2.d $w22, $w0, $w10 # encoding: [0x79,0xea,0x05,0x9b]
37 # CHECK: fmax_a.w $w10, $w16, $w10 # encoding: [0x7b,0xca,0x82,0x9b]
40 # CHECK: fmin.d $w27, $w27, $w10 # encoding: [0x7b,0x2a,0xde,0xdb]
41 # CHECK: fmin_a.w $w10, $w29, $w20 # encoding: [0x7b,0x54,0xea,0x9b]
46 # CHECK: fmul.d $w9, $w30, $w10 # encoding: [0x78,0xaa,0xf2,0x5b]
47 # CHECK: fsaf.w $w25, $w5, $w10 # encoding: [0x7a,0x0a,0x2e,0x5a]
73 # CHECK: madd_q.h $w16, $w20, $w10 # encoding: [0x79,0x4a,0xa4,0x1c]
77 # CHECK: msub_q.h $w24, $w26, $w10 # encoding: [0x79,0x8a,0xd6,0x1c]
98 fcor.w $w10, $w18, $w25
[all …]
|
| /external/llvm-project/llvm/test/MC/Mips/msa/ |
| D | test_3rf.s | 15 # CHECK: fcor.w $w10, $w18, $w25 # encoding: [0x78,0x59,0x92,0x9c]
32 # CHECK: fexp2.d $w22, $w0, $w10 # encoding: [0x79,0xea,0x05,0x9b]
37 # CHECK: fmax_a.w $w10, $w16, $w10 # encoding: [0x7b,0xca,0x82,0x9b]
40 # CHECK: fmin.d $w27, $w27, $w10 # encoding: [0x7b,0x2a,0xde,0xdb]
41 # CHECK: fmin_a.w $w10, $w29, $w20 # encoding: [0x7b,0x54,0xea,0x9b]
46 # CHECK: fmul.d $w9, $w30, $w10 # encoding: [0x78,0xaa,0xf2,0x5b]
47 # CHECK: fsaf.w $w25, $w5, $w10 # encoding: [0x7a,0x0a,0x2e,0x5a]
73 # CHECK: madd_q.h $w16, $w20, $w10 # encoding: [0x79,0x4a,0xa4,0x1c]
77 # CHECK: msub_q.h $w24, $w26, $w10 # encoding: [0x79,0x8a,0xd6,0x1c]
98 fcor.w $w10, $w18, $w25
[all …]
|
| /external/capstone/suite/MC/Mips/ |
| D | test_3r.s.cs | 5 0x78,0x60,0x51,0x90 = add_a.d $w6, $w10, $w0
15 0x79,0xa4,0xf2,0x90 = adds_u.h $w10, $w30, $w4
17 0x79,0xe9,0x57,0x90 = adds_u.d $w30, $w10, $w9
26 0x7a,0x8b,0xea,0x91 = asub_u.b $w10, $w29, $w11
28 0x7a,0xdf,0x9a,0x91 = asub_u.w $w10, $w19, $w31
29 0x7a,0xe0,0x54,0x51 = asub_u.d $w17, $w10, $w0
33 0x7a,0x6a,0xce,0xd0 = ave_s.d $w27, $w25, $w10
51 0x7b,0x2a,0x2f,0x8d = binsl.h $w30, $w5, $w10
67 0x78,0x29,0xda,0x8f = ceq.h $w10, $w27, $w9
72 0x7a,0x4a,0xd7,0x8f = cle_s.w $w30, $w26, $w10
[all …]
|
| D | test_3rf.s.cs | 14 0x78,0x59,0x92,0x9c = fcor.w $w10, $w18, $w25
31 0x79,0xea,0x05,0x9b = fexp2.d $w22, $w0, $w10
36 0x7b,0xca,0x82,0x9b = fmax_a.w $w10, $w16, $w10
39 0x7b,0x2a,0xde,0xdb = fmin.d $w27, $w27, $w10
40 0x7b,0x54,0xea,0x9b = fmin_a.w $w10, $w29, $w20
45 0x78,0xaa,0xf2,0x5b = fmul.d $w9, $w30, $w10
46 0x7a,0x0a,0x2e,0x5a = fsaf.w $w25, $w5, $w10
72 0x79,0x4a,0xa4,0x1c = madd_q.h $w16, $w20, $w10
76 0x79,0x8a,0xd6,0x1c = msub_q.h $w24, $w26, $w10
|
| /external/webrtc/modules/audio_coding/codecs/ilbc/ |
| D | smooth.c | 38 int32_t w00,w10,w11, endiff, crit; in WebRtcIlbcfix_Smooth() local
47 w00 = w10 = w11 = 0; in WebRtcIlbcfix_Smooth()
62 w10=WebRtcSpl_DotProductWithScale(surround,current,ENH_BLOCKL,scale); in WebRtcIlbcfix_Smooth()
72 bitsw10 = WebRtcSpl_GetSizeInBits(WEBRTC_SPL_ABS_W32(w10)); in WebRtcIlbcfix_Smooth()
130 w10w10 = (int16_t)WEBRTC_SPL_SHIFT_W32(w10, -scale) * in WebRtcIlbcfix_Smooth()
131 (int16_t)WEBRTC_SPL_SHIFT_W32(w10, -scale); in WebRtcIlbcfix_Smooth()
171 w10prim = w10 == 0 ? 0 : w10 * (1 << scale1); in WebRtcIlbcfix_Smooth()
|
| /external/rust/crates/ring/pregenerated/ |
| D | chacha-armv8-linux64.S | 98 add w6,w6,w10
114 eor w10,w10,w14
118 ror w10,w10,#20
122 add w6,w6,w10
138 eor w10,w10,w14
142 ror w10,w10,#25
145 add w5,w5,w10
161 eor w10,w10,w15
165 ror w10,w10,#20
169 add w5,w5,w10
[all …]
|
| D | chacha-armv8-ios64.S | 97 add w6,w6,w10
113 eor w10,w10,w14
117 ror w10,w10,#20
121 add w6,w6,w10
137 eor w10,w10,w14
141 ror w10,w10,#25
144 add w5,w5,w10
160 eor w10,w10,w15
164 ror w10,w10,#20
168 add w5,w5,w10
[all …]
|
| /external/boringssl/win-aarch64/crypto/chacha/ |
| D | chacha-armv8.S | 103 add w6,w6,w10
119 eor w10,w10,w14
123 ror w10,w10,#20
127 add w6,w6,w10
143 eor w10,w10,w14
147 ror w10,w10,#25
150 add w5,w5,w10
166 eor w10,w10,w15
170 ror w10,w10,#20
174 add w5,w5,w10
[all …]
|
| /external/rust/crates/quiche/deps/boringssl/linux-aarch64/crypto/chacha/ |
| D | chacha-armv8.S | 98 add w6,w6,w10
114 eor w10,w10,w14
118 ror w10,w10,#20
122 add w6,w6,w10
138 eor w10,w10,w14
142 ror w10,w10,#25
145 add w5,w5,w10
161 eor w10,w10,w15
165 ror w10,w10,#20
169 add w5,w5,w10
[all …]
|
| /external/openscreen/third_party/boringssl/linux-aarch64/crypto/chacha/ |
| D | chacha-armv8.S | 101 add w6,w6,w10
117 eor w10,w10,w14
121 ror w10,w10,#20
125 add w6,w6,w10
141 eor w10,w10,w14
145 ror w10,w10,#25
148 add w5,w5,w10
164 eor w10,w10,w15
168 ror w10,w10,#20
172 add w5,w5,w10
[all …]
|
| /external/openscreen/third_party/boringssl/win-aarch64/crypto/chacha/ |
| D | chacha-armv8.S | 103 add w6,w6,w10
119 eor w10,w10,w14
123 ror w10,w10,#20
127 add w6,w6,w10
143 eor w10,w10,w14
147 ror w10,w10,#25
150 add w5,w5,w10
166 eor w10,w10,w15
170 ror w10,w10,#20
174 add w5,w5,w10
[all …]
|
| /external/rust/crates/quiche/deps/boringssl/ios-aarch64/crypto/chacha/ |
| D | chacha-armv8.S | 97 add w6,w6,w10
113 eor w10,w10,w14
117 ror w10,w10,#20
121 add w6,w6,w10
137 eor w10,w10,w14
141 ror w10,w10,#25
144 add w5,w5,w10
160 eor w10,w10,w15
164 ror w10,w10,#20
168 add w5,w5,w10
[all …]
|
| /external/boringssl/ios-aarch64/crypto/chacha/ |
| D | chacha-armv8.S | 100 add w6,w6,w10
116 eor w10,w10,w14
120 ror w10,w10,#20
124 add w6,w6,w10
140 eor w10,w10,w14
144 ror w10,w10,#25
147 add w5,w5,w10
163 eor w10,w10,w15
167 ror w10,w10,#20
171 add w5,w5,w10
[all …]
|
| /external/openscreen/third_party/boringssl/ios-aarch64/crypto/chacha/ |
| D | chacha-armv8.S | 100 add w6,w6,w10
116 eor w10,w10,w14
120 ror w10,w10,#20
124 add w6,w6,w10
140 eor w10,w10,w14
144 ror w10,w10,#25
147 add w5,w5,w10
163 eor w10,w10,w15
167 ror w10,w10,#20
171 add w5,w5,w10
[all …]
|
| /external/boringssl/linux-aarch64/crypto/chacha/ |
| D | chacha-armv8.S | 101 add w6,w6,w10
117 eor w10,w10,w14
121 ror w10,w10,#20
125 add w6,w6,w10
141 eor w10,w10,w14
145 ror w10,w10,#25
148 add w5,w5,w10
164 eor w10,w10,w15
168 ror w10,w10,#20
172 add w5,w5,w10
[all …]
|