/external/rust/crates/quiche/deps/boringssl/ios-aarch64/crypto/fipsmodule/ |
D | sha256-armv8.S | 72 ldr w16,[x16,_OPENSSL_armcap_P@PAGEOFF] 73 tst w16,#ARMV8_SHA256 103 ror w16,w24,#6 111 eor w16,w16,w6,ror#11 // Sigma1(e) 115 add w27,w27,w16 // h+=Sigma1(e) 128 ror w16,w23,#6 136 eor w16,w16,w7,ror#11 // Sigma1(e) 140 add w26,w26,w16 // h+=Sigma1(e) 152 ror w16,w22,#6 160 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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/external/rust/crates/ring/pregenerated/ |
D | sha256-armv8-ios64.S | 71 ldr w16,[x16,_GFp_armcap_P@PAGEOFF] 72 tst w16,#ARMV8_SHA256 103 ror w16,w24,#6 111 eor w16,w16,w6,ror#11 // Sigma1(e) 115 add w27,w27,w16 // h+=Sigma1(e) 128 ror w16,w23,#6 136 eor w16,w16,w7,ror#11 // Sigma1(e) 140 add w26,w26,w16 // h+=Sigma1(e) 152 ror w16,w22,#6 160 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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D | sha256-armv8-linux64.S | 72 ldr w16,[x16,:lo12:GFp_armcap_P] 73 tst w16,#ARMV8_SHA256 104 ror w16,w24,#6 112 eor w16,w16,w6,ror#11 // Sigma1(e) 116 add w27,w27,w16 // h+=Sigma1(e) 129 ror w16,w23,#6 137 eor w16,w16,w7,ror#11 // Sigma1(e) 141 add w26,w26,w16 // h+=Sigma1(e) 153 ror w16,w22,#6 161 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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/external/boringssl/ios-aarch64/crypto/fipsmodule/ |
D | sha256-armv8.S | 74 ldr w16,[x16,_OPENSSL_armcap_P@PAGEOFF] 75 tst w16,#ARMV8_SHA256 106 ror w16,w24,#6 114 eor w16,w16,w6,ror#11 // Sigma1(e) 118 add w27,w27,w16 // h+=Sigma1(e) 131 ror w16,w23,#6 139 eor w16,w16,w7,ror#11 // Sigma1(e) 143 add w26,w26,w16 // h+=Sigma1(e) 155 ror w16,w22,#6 163 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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/external/openscreen/third_party/boringssl/win-aarch64/crypto/fipsmodule/ |
D | sha256-armv8.S | 77 ldr w16,[x16,:lo12:OPENSSL_armcap_P] 78 tst w16,#ARMV8_SHA256 109 ror w16,w24,#6 117 eor w16,w16,w6,ror#11 // Sigma1(e) 121 add w27,w27,w16 // h+=Sigma1(e) 134 ror w16,w23,#6 142 eor w16,w16,w7,ror#11 // Sigma1(e) 146 add w26,w26,w16 // h+=Sigma1(e) 158 ror w16,w22,#6 166 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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/external/openscreen/third_party/boringssl/ios-aarch64/crypto/fipsmodule/ |
D | sha256-armv8.S | 74 ldr w16,[x16,_OPENSSL_armcap_P@PAGEOFF] 75 tst w16,#ARMV8_SHA256 106 ror w16,w24,#6 114 eor w16,w16,w6,ror#11 // Sigma1(e) 118 add w27,w27,w16 // h+=Sigma1(e) 131 ror w16,w23,#6 139 eor w16,w16,w7,ror#11 // Sigma1(e) 143 add w26,w26,w16 // h+=Sigma1(e) 155 ror w16,w22,#6 163 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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/external/boringssl/win-aarch64/crypto/fipsmodule/ |
D | sha256-armv8.S | 77 ldr w16,[x16,:lo12:OPENSSL_armcap_P] 78 tst w16,#ARMV8_SHA256 109 ror w16,w24,#6 117 eor w16,w16,w6,ror#11 // Sigma1(e) 121 add w27,w27,w16 // h+=Sigma1(e) 134 ror w16,w23,#6 142 eor w16,w16,w7,ror#11 // Sigma1(e) 146 add w26,w26,w16 // h+=Sigma1(e) 158 ror w16,w22,#6 166 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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/external/arm-trusted-firmware/drivers/coreboot/cbmem_console/aarch64/ |
D | cbmem_console.S | 60 ldr w16, [x1, #-4] /* load cursor (one u32 before body) */ 61 and w17, w16, #0xf0000000 /* keep flags part in w17 */ 62 and w16, w16, #0x0fffffff /* keep actual cursor part in w16 */ 64 cmp w16, w2 /* sanity check that cursor < size */ 70 strb w0, [x1, w16, uxtw] /* body[cursor] = character */ 71 add w16, w16, #1 /* cursor++ */ 72 cmp w16, w2 /* if cursor < size... */ 75 mov w16, #0 /* on overflow, set cursor back to 0 */ 79 orr w16, w16, w17 /* merge cursor and flags back */ 80 str w16, [x1, #-4] /* write back cursor to memory */
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/external/rust/crates/quiche/deps/boringssl/linux-aarch64/crypto/fipsmodule/ |
D | sha256-armv8.S | 73 ldr w16,[x16,:lo12:OPENSSL_armcap_P] 74 tst w16,#ARMV8_SHA256 104 ror w16,w24,#6 112 eor w16,w16,w6,ror#11 // Sigma1(e) 116 add w27,w27,w16 // h+=Sigma1(e) 129 ror w16,w23,#6 137 eor w16,w16,w7,ror#11 // Sigma1(e) 141 add w26,w26,w16 // h+=Sigma1(e) 153 ror w16,w22,#6 161 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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/external/boringssl/linux-aarch64/crypto/fipsmodule/ |
D | sha256-armv8.S | 75 ldr w16,[x16,:lo12:OPENSSL_armcap_P] 76 tst w16,#ARMV8_SHA256 107 ror w16,w24,#6 115 eor w16,w16,w6,ror#11 // Sigma1(e) 119 add w27,w27,w16 // h+=Sigma1(e) 132 ror w16,w23,#6 140 eor w16,w16,w7,ror#11 // Sigma1(e) 144 add w26,w26,w16 // h+=Sigma1(e) 156 ror w16,w22,#6 164 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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D | sha1-armv8.S | 34 ldr w16,[x16,:lo12:OPENSSL_armcap_P] 35 tst w16,#ARMV8_SHA1 221 add w21,w21,w16 // future e+=X[i] 246 eor w3,w3,w16 309 eor w8,w8,w16 378 eor w14,w14,w16 402 eor w16,w16,w19 406 eor w16,w16,w8 410 eor w16,w16,w13 413 ror w16,w16,#31 [all …]
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/external/openscreen/third_party/boringssl/linux-aarch64/crypto/fipsmodule/ |
D | sha256-armv8.S | 75 ldr w16,[x16,:lo12:OPENSSL_armcap_P] 76 tst w16,#ARMV8_SHA256 107 ror w16,w24,#6 115 eor w16,w16,w6,ror#11 // Sigma1(e) 119 add w27,w27,w16 // h+=Sigma1(e) 132 ror w16,w23,#6 140 eor w16,w16,w7,ror#11 // Sigma1(e) 144 add w26,w26,w16 // h+=Sigma1(e) 156 ror w16,w22,#6 164 eor w16,w16,w8,ror#11 // Sigma1(e) [all …]
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D | sha1-armv8.S | 34 ldr w16,[x16,:lo12:OPENSSL_armcap_P] 35 tst w16,#ARMV8_SHA1 221 add w21,w21,w16 // future e+=X[i] 246 eor w3,w3,w16 309 eor w8,w8,w16 378 eor w14,w14,w16 402 eor w16,w16,w19 406 eor w16,w16,w8 410 eor w16,w16,w13 413 ror w16,w16,#31 [all …]
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/external/llvm/test/MC/Mips/msa/ |
D | test_3rf.s | 7 # CHECK: fceq.w $w1, $w23, $w16 # encoding: [0x78,0x90,0xb8,0x5a] 8 # CHECK: fceq.d $w0, $w8, $w16 # encoding: [0x78,0xb0,0x40,0x1a] 9 # CHECK: fcle.w $w16, $w9, $w24 # encoding: [0x79,0x98,0x4c,0x1a] 26 # CHECK: fcune.d $w16, $w26, $w21 # encoding: [0x78,0xb5,0xd4,0x1c] 29 # CHECK: fexdo.h $w8, $w0, $w16 # encoding: [0x7a,0x10,0x02,0x1b] 37 # CHECK: fmax_a.w $w10, $w16, $w10 # encoding: [0x7b,0xca,0x82,0x9b] 44 # CHECK: fmsub.d $w8, $w18, $w16 # encoding: [0x79,0x70,0x92,0x1b] 54 # CHECK: fslt.d $w16, $w26, $w21 # encoding: [0x7b,0x35,0xd4,0x1a] 61 # CHECK: fsueq.w $w16, $w24, $w25 # encoding: [0x7a,0xd9,0xc4,0x1a] 69 # CHECK: fsune.w $w16, $w31, $w2 # encoding: [0x7a,0x82,0xfc,0x1c] [all …]
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D | test_3r.s | 13 # CHECK: adds_s.w $w16, $w14, $w13 # encoding: [0x79,0x4d,0x74,0x10] 23 # CHECK: asub_s.b $w23, $w16, $w3 # encoding: [0x7a,0x03,0x85,0xd1] 32 # CHECK: ave_s.h $w16, $w19, $w9 # encoding: [0x7a,0x29,0x9c,0x10] 35 # CHECK: ave_u.b $w16, $w19, $w9 # encoding: [0x7a,0x89,0x9c,0x10] 39 # CHECK: aver_s.b $w26, $w16, $w2 # encoding: [0x7b,0x02,0x86,0x90] 48 # CHECK: bclr.h $w16, $w21, $w28 # encoding: [0x79,0xbc,0xac,0x0d] 51 # CHECK: binsl.b $w5, $w16, $w24 # encoding: [0x7b,0x18,0x81,0x4d] 60 # CHECK: bneg.h $w28, $w16, $w4 # encoding: [0x7a,0xa4,0x87,0x0d] 81 # CHECK: clt_s.w $w23, $w8, $w16 # encoding: [0x79,0x50,0x45,0xcf] 84 # CHECK: clt_u.h $w16, $w31, $w23 # encoding: [0x79,0xb7,0xfc,0x0f] [all …]
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D | set-msa-directive.s | 7 # CHECK: addvi.d $w16, $w19, 7 11 # CHECK: subvi.d $w16, $w19, 7 17 addvi.d $w16, $w19, 7 22 subvi.d $w16, $w19, 7
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/external/llvm-project/llvm/test/MC/Mips/msa/ |
D | test_3rf.s | 7 # CHECK: fceq.w $w1, $w23, $w16 # encoding: [0x78,0x90,0xb8,0x5a] 8 # CHECK: fceq.d $w0, $w8, $w16 # encoding: [0x78,0xb0,0x40,0x1a] 9 # CHECK: fcle.w $w16, $w9, $w24 # encoding: [0x79,0x98,0x4c,0x1a] 26 # CHECK: fcune.d $w16, $w26, $w21 # encoding: [0x78,0xb5,0xd4,0x1c] 29 # CHECK: fexdo.h $w8, $w0, $w16 # encoding: [0x7a,0x10,0x02,0x1b] 37 # CHECK: fmax_a.w $w10, $w16, $w10 # encoding: [0x7b,0xca,0x82,0x9b] 44 # CHECK: fmsub.d $w8, $w18, $w16 # encoding: [0x79,0x70,0x92,0x1b] 54 # CHECK: fslt.d $w16, $w26, $w21 # encoding: [0x7b,0x35,0xd4,0x1a] 61 # CHECK: fsueq.w $w16, $w24, $w25 # encoding: [0x7a,0xd9,0xc4,0x1a] 69 # CHECK: fsune.w $w16, $w31, $w2 # encoding: [0x7a,0x82,0xfc,0x1c] [all …]
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D | test_3r.s | 13 # CHECK: adds_s.w $w16, $w14, $w13 # encoding: [0x79,0x4d,0x74,0x10] 23 # CHECK: asub_s.b $w23, $w16, $w3 # encoding: [0x7a,0x03,0x85,0xd1] 32 # CHECK: ave_s.h $w16, $w19, $w9 # encoding: [0x7a,0x29,0x9c,0x10] 35 # CHECK: ave_u.b $w16, $w19, $w9 # encoding: [0x7a,0x89,0x9c,0x10] 39 # CHECK: aver_s.b $w26, $w16, $w2 # encoding: [0x7b,0x02,0x86,0x90] 48 # CHECK: bclr.h $w16, $w21, $w28 # encoding: [0x79,0xbc,0xac,0x0d] 51 # CHECK: binsl.b $w5, $w16, $w24 # encoding: [0x7b,0x18,0x81,0x4d] 60 # CHECK: bneg.h $w28, $w16, $w4 # encoding: [0x7a,0xa4,0x87,0x0d] 81 # CHECK: clt_s.w $w23, $w8, $w16 # encoding: [0x79,0x50,0x45,0xcf] 84 # CHECK: clt_u.h $w16, $w31, $w23 # encoding: [0x79,0xb7,0xfc,0x0f] [all …]
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D | set-msa-directive.s | 7 # CHECK: addvi.d $w16, $w19, 7 11 # CHECK: subvi.d $w16, $w19, 7 17 addvi.d $w16, $w19, 7 22 subvi.d $w16, $w19, 7
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/external/capstone/suite/MC/Mips/ |
D | test_3rf.s.cs | 6 0x78,0x90,0xb8,0x5a = fceq.w $w1, $w23, $w16 7 0x78,0xb0,0x40,0x1a = fceq.d $w0, $w8, $w16 8 0x79,0x98,0x4c,0x1a = fcle.w $w16, $w9, $w24 25 0x78,0xb5,0xd4,0x1c = fcune.d $w16, $w26, $w21 28 0x7a,0x10,0x02,0x1b = fexdo.h $w8, $w0, $w16 36 0x7b,0xca,0x82,0x9b = fmax_a.w $w10, $w16, $w10 43 0x79,0x70,0x92,0x1b = fmsub.d $w8, $w18, $w16 53 0x7b,0x35,0xd4,0x1a = fslt.d $w16, $w26, $w21 60 0x7a,0xd9,0xc4,0x1a = fsueq.w $w16, $w24, $w25 68 0x7a,0x82,0xfc,0x1c = fsune.w $w16, $w31, $w2 [all …]
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D | test_3r.s.cs | 12 0x79,0x4d,0x74,0x10 = adds_s.w $w16, $w14, $w13 22 0x7a,0x03,0x85,0xd1 = asub_s.b $w23, $w16, $w3 31 0x7a,0x29,0x9c,0x10 = ave_s.h $w16, $w19, $w9 34 0x7a,0x89,0x9c,0x10 = ave_u.b $w16, $w19, $w9 38 0x7b,0x02,0x86,0x90 = aver_s.b $w26, $w16, $w2 47 0x79,0xbc,0xac,0x0d = bclr.h $w16, $w21, $w28 50 0x7b,0x18,0x81,0x4d = binsl.b $w5, $w16, $w24 59 0x7a,0xa4,0x87,0x0d = bneg.h $w28, $w16, $w4 80 0x79,0x50,0x45,0xcf = clt_s.w $w23, $w8, $w16 83 0x79,0xb7,0xfc,0x0f = clt_u.h $w16, $w31, $w23 [all …]
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/external/llvm-project/llvm/test/CodeGen/AArch64/ |
D | urem-vector-lkk.ll | 65 ; CHECK-NEXT: sub w16, w8, w13 68 ; CHECK-NEXT: add w13, w13, w16, lsr #1 69 ; CHECK-NEXT: sub w16, w10, w14 71 ; CHECK-NEXT: add w14, w14, w16, lsr #1 72 ; CHECK-NEXT: sub w16, w11, w15 73 ; CHECK-NEXT: add w15, w15, w16, lsr #1 74 ; CHECK-NEXT: sub w16, w12, w9 75 ; CHECK-NEXT: add w9, w9, w16, lsr #1 76 ; CHECK-NEXT: mov w16, #95 78 ; CHECK-NEXT: msub w8, w13, w16, w8 [all …]
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D | srem-vector-lkk.ll | 75 ; CHECK-NEXT: asr w16, w13, #6 78 ; CHECK-NEXT: add w13, w16, w13, lsr #31 79 ; CHECK-NEXT: asr w16, w14, #6 81 ; CHECK-NEXT: add w14, w16, w14, lsr #31 82 ; CHECK-NEXT: asr w16, w15, #6 83 ; CHECK-NEXT: add w15, w16, w15, lsr #31 84 ; CHECK-NEXT: asr w16, w9, #6 85 ; CHECK-NEXT: add w9, w16, w9, lsr #31 86 ; CHECK-NEXT: mov w16, #95 87 ; CHECK-NEXT: msub w10, w14, w16, w10 [all …]
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/external/llvm/test/MC/Disassembler/Mips/msa/ |
D | test_3rf.txt | 7 0x78 0x90 0xb8 0x5a # CHECK: fceq.w $w1, $w23, $w16 8 0x78 0xb0 0x40 0x1a # CHECK: fceq.d $w0, $w8, $w16 9 0x79 0x98 0x4c 0x1a # CHECK: fcle.w $w16, $w9, $w24 26 0x78 0xb5 0xd4 0x1c # CHECK: fcune.d $w16, $w26, $w21 29 0x7a 0x10 0x02 0x1b # CHECK: fexdo.h $w8, $w0, $w16 37 0x7b 0xca 0x82 0x9b # CHECK: fmax_a.w $w10, $w16, $w10 44 0x79 0x70 0x92 0x1b # CHECK: fmsub.d $w8, $w18, $w16 54 0x7b 0x35 0xd4 0x1a # CHECK: fslt.d $w16, $w26, $w21 61 0x7a 0xd9 0xc4 0x1a # CHECK: fsueq.w $w16, $w24, $w25 69 0x7a 0x82 0xfc 0x1c # CHECK: fsune.w $w16, $w31, $w2 [all …]
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/external/llvm-project/llvm/test/MC/Disassembler/Mips/msa/ |
D | test_3rf.txt | 7 0x78 0x90 0xb8 0x5a # CHECK: fceq.w $w1, $w23, $w16 8 0x78 0xb0 0x40 0x1a # CHECK: fceq.d $w0, $w8, $w16 9 0x79 0x98 0x4c 0x1a # CHECK: fcle.w $w16, $w9, $w24 26 0x78 0xb5 0xd4 0x1c # CHECK: fcune.d $w16, $w26, $w21 29 0x7a 0x10 0x02 0x1b # CHECK: fexdo.h $w8, $w0, $w16 37 0x7b 0xca 0x82 0x9b # CHECK: fmax_a.w $w10, $w16, $w10 44 0x79 0x70 0x92 0x1b # CHECK: fmsub.d $w8, $w18, $w16 54 0x7b 0x35 0xd4 0x1a # CHECK: fslt.d $w16, $w26, $w21 61 0x7a 0xd9 0xc4 0x1a # CHECK: fsueq.w $w16, $w24, $w25 69 0x7a 0x82 0xfc 0x1c # CHECK: fsune.w $w16, $w31, $w2 [all …]
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