Home
last modified time | relevance | path

Searched refs:win_reg (Results 1 – 5 of 5) sorted by relevance

/external/arm-trusted-firmware/drivers/marvell/
Diob.c150 uint32_t win_id, win_reg; in init_iob() local
173 win_reg = mmio_read_32(IOB_WIN_CR_OFFSET(win_id)); in init_iob()
174 win_reg &= ~WIN_ENABLE_BIT; in init_iob()
175 mmio_write_32(IOB_WIN_CR_OFFSET(win_id), win_reg); in init_iob()
177 win_reg = ~IOB_WIN_ENA_CTRL_WRITE_SECURE; in init_iob()
178 win_reg &= ~IOB_WIN_ENA_CTRL_READ_SECURE; in init_iob()
179 win_reg &= ~IOB_WIN_ENA_WRITE_SECURE; in init_iob()
180 win_reg &= ~IOB_WIN_ENA_READ_SECURE; in init_iob()
181 mmio_write_32(IOB_WIN_SCR_OFFSET(win_id), win_reg); in init_iob()
Dgwin.c92 uint32_t win_reg; in gwin_disable_window() local
94 win_reg = mmio_read_32(GWIN_CR_OFFSET(ap_index, win_num)); in gwin_disable_window()
95 win_reg &= ~WIN_ENABLE_BIT; in gwin_disable_window()
96 mmio_write_32(GWIN_CR_OFFSET(ap_index, win_num), win_reg); in gwin_disable_window()
182 uint32_t win_reg; in init_gwin() local
217 win_reg = mmio_read_32(CCU_GRU_CR_OFFSET(ap_index)); in init_gwin()
218 win_reg |= CCR_GRU_CR_GWIN_MBYPASS; in init_gwin()
219 mmio_write_32(CCU_GRU_CR_OFFSET(ap_index), win_reg); in init_gwin()
Dccu.c146 uint32_t win_reg; in ccu_disable_win() local
153 win_reg = mmio_read_32(CCU_WIN_CR_OFFSET(ap_index, win_id)); in ccu_disable_win()
154 win_reg &= ~WIN_ENABLE_BIT; in ccu_disable_win()
155 mmio_write_32(CCU_WIN_CR_OFFSET(ap_index, win_id), win_reg); in ccu_disable_win()
317 uint32_t win_id, win_reg; in init_ccu() local
348 win_reg = (dram_target & CCU_GCR_TARGET_MASK) << CCU_GCR_TARGET_OFFSET; in init_ccu()
349 mmio_write_32(CCU_WIN_GCR_OFFSET(ap_index), win_reg); in init_ccu()
387 win_reg = (marvell_get_ccu_gcr_target(ap_index) & CCU_GCR_TARGET_MASK) in init_ccu()
389 mmio_write_32(CCU_WIN_GCR_OFFSET(ap_index), win_reg); in init_ccu()
Dio_win.c92 uint32_t win_reg; in io_win_disable_window() local
99 win_reg = mmio_read_32(IO_WIN_ALR_OFFSET(ap_index, win_num)); in io_win_disable_window()
100 win_reg &= ~WIN_ENABLE_BIT; in io_win_disable_window()
101 mmio_write_32(IO_WIN_ALR_OFFSET(ap_index, win_num), win_reg); in io_win_disable_window()
228 uint32_t win_id, win_reg; in init_io_win() local
245 win_reg = marvell_get_io_win_gcr_target(ap_index); in init_io_win()
247 win_reg); in init_io_win()
Damb_adec.c119 uint32_t win_id, win_reg; in init_amb_adec() local
139 win_reg = mmio_read_32(AMB_WIN_CR_OFFSET(win_id)); in init_amb_adec()
140 win_reg &= ~WIN_ENABLE_BIT; in init_amb_adec()
141 mmio_write_32(AMB_WIN_CR_OFFSET(win_id), win_reg); in init_amb_adec()