Home
last modified time | relevance | path

Searched refs:workaround_bo (Results 1 – 14 of 14) sorted by relevance

/external/mesa3d/src/mesa/drivers/dri/i965/
Dbrw_pipe_control.c127 brw->workaround_bo, in gen7_emit_vs_workaround_flush()
196 brw->workaround_bo, in gen7_emit_cs_stall_flush()
245 brw->workaround_bo, in brw_emit_post_sync_nonzero_flush()
304 brw->workaround_bo, in brw_emit_end_of_pipe_sync()
342 brw->workaround_bo, brw->workaround_bo_offset); in brw_emit_end_of_pipe_sync()
382 bo_map = brw_bo_map(NULL, brw->workaround_bo, MAP_READ | MAP_WRITE); in init_identifier_bo()
386 brw->workaround_bo->kflags |= EXEC_OBJECT_CAPTURE; in init_identifier_bo()
390 brw_bo_unmap(brw->workaround_bo); in init_identifier_bo()
436 brw->workaround_bo = brw_bo_alloc(brw->bufmgr, "workaround", 4096, in brw_init_pipe_control()
438 if (brw->workaround_bo == NULL) in brw_init_pipe_control()
[all …]
DgenX_pipe_control.c149 bo = brw->workaround_bo; in genX()
DgenX_blorp_exec.c241 .buffer = brw->workaround_bo, in blorp_get_workaround_address()
Dbrw_context.h738 struct brw_bo *workaround_bo; member
Dintel_batchbuffer.c284 struct brw_bo *identifier_bo = brw->workaround_bo; in intel_batchbuffer_reset()
/external/mesa3d/src/gallium/drivers/iris/
Diris_screen.c611 iris_bo_unreference(screen->workaround_bo); in iris_screen_destroy()
733 bo_map = iris_bo_map(NULL, screen->workaround_bo, MAP_READ | MAP_WRITE); in iris_init_identifier_bo()
737 screen->workaround_bo->kflags |= EXEC_OBJECT_CAPTURE; in iris_init_identifier_bo()
739 .bo = screen->workaround_bo, in iris_init_identifier_bo()
744 iris_bo_unmap(screen->workaround_bo); in iris_init_identifier_bo()
800 screen->workaround_bo = in iris_screen_create()
802 if (!screen->workaround_bo) in iris_screen_create()
Diris_screen.h216 struct iris_bo *workaround_bo; member
Diris_batch.c281 if (bo == batch->screen->workaround_bo) in iris_use_pinned_bo()
409 iris_use_pinned_bo(batch, screen->workaround_bo, false, IRIS_DOMAIN_NONE); in iris_batch_reset()
Diris_state.c5106 iris_use_pinned_bo(batch, batch->screen->workaround_bo, false, in iris_restore_render_saved_bos()
/external/mesa3d/src/intel/vulkan/
Danv_device.c2970 &device->workaround_bo); in anv_CreateDevice()
2975 .bo = device->workaround_bo, in anv_CreateDevice()
2977 intel_debug_write_identifiers(device->workaround_bo->map, in anv_CreateDevice()
2978 device->workaround_bo->size, in anv_CreateDevice()
2983 intel_debug_get_identifier_block(device->workaround_bo->map, in anv_CreateDevice()
2984 device->workaround_bo->size, in anv_CreateDevice()
3058 anv_device_release_bo(device, device->workaround_bo); in anv_CreateDevice()
3127 anv_device_release_bo(device, device->workaround_bo); in anv_DestroyDevice()
Danv_batch_chain.c1711 anv_execbuf_add_bo(device, &execbuf, device->workaround_bo, NULL, 0); in anv_queue_execbuf_locked()
Danv_private.h1388 struct anv_bo * workaround_bo; member
DgenX_cmd_buffer.c3054 .bo = cmd_buffer->device->workaround_bo, in get_push_range_address()
/external/mesa3d/docs/relnotes/
D20.2.0.rst3101 - i965: store workaround_bo offset