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Searched refs:xadd (Results 1 – 25 of 37) sorted by relevance

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/external/bcc/tests/lua/
D.luacheckrc4 new_globals = { "pkt", "time", "xadd", "c" }
11 new_globals = { "pkt", "time", "xadd", "c" }
/external/swiftshader/third_party/subzero/unittest/AssemblerX8632/
DLocked.cpp156 __ xadd(IceType_i##Size, dwordAddress(T0), \ in TEST_F()
203 __ xadd(IceType_i8, Address(0x1FF00, AssemblerFixup::NoFixup), in TEST_F() local
211 __ xadd(IceType_i8, Address(0x1FF00, AssemblerFixup::NoFixup), in TEST_F() local
221 __ xadd(IceType_i16, Address(0x1FF00, AssemblerFixup::NoFixup), in TEST_F() local
229 __ xadd(IceType_i16, Address(0x1FF00, AssemblerFixup::NoFixup), in TEST_F() local
239 __ xadd(IceType_i32, Address(0x1FF00, AssemblerFixup::NoFixup), in TEST_F() local
247 __ xadd(IceType_i32, Address(0x1FF00, AssemblerFixup::NoFixup), in TEST_F() local
/external/swiftshader/third_party/subzero/unittest/AssemblerX8664/
DLocked.cpp155 __ xadd(IceType_i##Size, dwordAddress(T0), Encoded_GPR_##Dst1(), \ in TEST_F()
207 __ xadd(IceType_i8, Address::Absolute(0x1FF00), Encoded_GPR_r14(), in TEST_F() local
216 __ xadd(IceType_i8, Address::Absolute(0x1FF00), Encoded_GPR_r14(), Locked); in TEST_F() local
226 __ xadd(IceType_i16, Address::Absolute(0x1FF00), Encoded_GPR_r14(), in TEST_F() local
235 __ xadd(IceType_i16, Address::Absolute(0x1FF00), Encoded_GPR_r14(), Locked); in TEST_F() local
245 __ xadd(IceType_i32, Address::Absolute(0x1FF00), Encoded_GPR_r14(), in TEST_F() local
254 __ xadd(IceType_i32, Address::Absolute(0x1FF00), Encoded_GPR_r14(), Locked); in TEST_F() local
/external/bcc/examples/lua/
Dkprobe-write.lua27 xadd(map[0], 1)
Dsock-proto.lua30 xadd(map[proto], 1) -- Atomic `map[proto] += 1`
Dsock-protolen.lua30 xadd(map[proto], skb.len) -- Atomic `map[proto] += <payload length>`
Dsock-parse-dns.lua44 xadd(map[qtype], 1)
Dsock-parse-http.lua43 else xadd(map[h], 1)
Dkprobe-latency.lua45 xadd(lat_map[index], 1)
Dtracepoint-offcputime.lua56 xadd(counts[key], delta)
/external/bcc/src/lua/bpf/spec/
Dcompile_spec.lua17 xadd(mock_map[proto], 1)
Dcodegen_spec.lua567 xadd(val, 1)
608 xadd(val, 1)
/external/mesa3d/src/gallium/drivers/nouveau/codegen/
Dnv50_ir_lowering_gv100.cpp234 Instruction *xadd = in handleSUB() local
236 xadd->src(0).mod = i->src(0).mod; in handleSUB()
237 xadd->src(1).mod = i->src(1).mod ^ Modifier(NV50_IR_MOD_NEG); in handleSUB()
238 xadd->ftz = i->ftz; in handleSUB()
/external/llvm-project/llvm/test/tools/llvm-mca/X86/BtVer2/
Dxadd.s5 xadd %ecx, (%rsp) label
13 lock xadd %ecx, (%rsp)
/external/bcc/src/lua/bpf/
Dbuiltins.lua99 local function xadd() error('NYI') end function
100 builtins.xadd = xadd
101 builtins[xadd] = function (e, ret, a, b, off)
/external/llvm-project/llvm/test/CodeGen/X86/
D2009-10-19-atomic-cmp-eflags.ll40 ;CHECK: lock {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live
/external/llvm/test/CodeGen/X86/
D2009-10-19-atomic-cmp-eflags.ll40 ;CHECK: lock {{xadd|addq}} %rdx, __profiling_callsite_timestamps_live
/external/bcc/src/lua/
DREADME.md67 xadd(map[proto], 1) -- Increment packet count
129 * `xadd(dst, inc)` - exclusive add, a synchronous `*dst += b` if Lua had `+=` operator
/external/swiftshader/third_party/subzero/docs/
DLOWERING.rst226 the x86 ``xadd`` and ``xchg`` instructions modify both source operands. Some
229 have at most one ``Dest``, the ``xadd`` and ``xchg`` instructions need special
/external/llvm-project/openmp/runtime/src/
Dz_Windows_NT-586_asm.asm124 lock xadd DWORD PTR [ecx], eax
683 lock xadd DWORD PTR [rcx], eax
707 lock xadd QWORD PTR [rcx], rax
/external/capstone/arch/X86/
DX86MappingInsnOp_reduce.inc2820 { /* X86_LXADD16, X86_INS_XADD: xadd{w} $ptr, $val */
2824 { /* X86_LXADD32, X86_INS_XADD: xadd{l} $ptr, $val */
2828 { /* X86_LXADD64, X86_INS_XADD: xadd{q} $ptr, $val */
2832 { /* X86_LXADD8, X86_INS_XADD: xadd{b} $ptr, $val */
5920 { /* X86_XADD16rm, X86_INS_XADD: xadd{w} $dst, $src */
5924 { /* X86_XADD16rr, X86_INS_XADD: xadd{w} $dst, $src */
5928 { /* X86_XADD32rm, X86_INS_XADD: xadd{l} $dst, $src */
5932 { /* X86_XADD32rr, X86_INS_XADD: xadd{l} $dst, $src */
5936 { /* X86_XADD64rm, X86_INS_XADD: xadd{q} $dst, $src */
5940 { /* X86_XADD64rr, X86_INS_XADD: xadd{q} $dst, $src */
[all …]
/external/llvm/lib/Target/X86/
DX86InstrInfo.td1884 "xadd{b}\t{$src, $dst|$dst, $src}", [], IIC_XADD_REG>, TB;
1886 "xadd{w}\t{$src, $dst|$dst, $src}", [], IIC_XADD_REG>, TB,
1889 "xadd{l}\t{$src, $dst|$dst, $src}", [], IIC_XADD_REG>, TB,
1892 "xadd{q}\t{$src, $dst|$dst, $src}", [], IIC_XADD_REG>, TB;
1897 "xadd{b}\t{$src, $dst|$dst, $src}", [], IIC_XADD_MEM>, TB;
1899 "xadd{w}\t{$src, $dst|$dst, $src}", [], IIC_XADD_MEM>, TB,
1902 "xadd{l}\t{$src, $dst|$dst, $src}", [], IIC_XADD_MEM>, TB,
1905 "xadd{q}\t{$src, $dst|$dst, $src}", [], IIC_XADD_MEM>, TB;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstrInfo.td2083 "xadd{b}\t{$src2, $src1|$src1, $src2}", []>, TB;
2086 "xadd{w}\t{$src2, $src1|$src1, $src2}", []>, TB, OpSize16;
2089 "xadd{l}\t{$src2, $src1|$src1, $src2}", []>, TB, OpSize32;
2092 "xadd{q}\t{$src2, $src1|$src1, $src2}", []>, TB;
2099 "xadd{b}\t{$val, $ptr|$ptr, $val}", []>, TB;
2102 "xadd{w}\t{$val, $ptr|$ptr, $val}", []>, TB,
2106 "xadd{l}\t{$val, $ptr|$ptr, $val}", []>, TB,
2110 "xadd{q}\t{$val, $ptr|$ptr, $val}", []>, TB;
/external/llvm-project/llvm/lib/Target/X86/
DX86InstrInfo.td2149 "xadd{b}\t{$src2, $src1|$src1, $src2}", []>, TB;
2152 "xadd{w}\t{$src2, $src1|$src1, $src2}", []>, TB, OpSize16;
2155 "xadd{l}\t{$src2, $src1|$src1, $src2}", []>, TB, OpSize32;
2158 "xadd{q}\t{$src2, $src1|$src1, $src2}", []>, TB;
2165 "xadd{b}\t{$val, $ptr|$ptr, $val}", []>, TB;
2168 "xadd{w}\t{$val, $ptr|$ptr, $val}", []>, TB,
2172 "xadd{l}\t{$val, $ptr|$ptr, $val}", []>, TB,
2176 "xadd{q}\t{$val, $ptr|$ptr, $val}", []>, TB;
/external/swiftshader/third_party/subzero/src/
DIceAssemblerX86Base.h720 void xadd(Type Ty, const Address &address, GPRRegister reg, bool Locked);

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