Searched refs:xdn (Results 1 – 5 of 5) sorted by relevance
/external/llvm/test/CodeGen/Mips/ |
D | fp16instrinsmc.ll | 9 @xdn = global double 0xC0311F9ADD373963, align 8 99 %0 = load double, double* @xdn, align 8
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/external/llvm-project/llvm/test/CodeGen/Mips/ |
D | fp16instrinsmc.ll | 9 @xdn = global double 0xC0311F9ADD373963, align 8 99 %0 = load double, double* @xdn, align 8
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/external/vixl/src/aarch64/ |
D | assembler-aarch64.h | 3962 void decb(const Register& xdn, int pattern = SVE_ALL, int multiplier = 1); 3965 void decd(const Register& xdn, int pattern = SVE_ALL, int multiplier = 1); 3971 void dech(const Register& xdn, int pattern = SVE_ALL, int multiplier = 1); 3983 void decw(const Register& xdn, int pattern = SVE_ALL, int multiplier = 1); 4467 void incb(const Register& xdn, int pattern = SVE_ALL, int multiplier = 1); 4470 void incd(const Register& xdn, int pattern = SVE_ALL, int multiplier = 1); 4476 void inch(const Register& xdn, int pattern = SVE_ALL, int multiplier = 1); 4488 void incw(const Register& xdn, int pattern = SVE_ALL, int multiplier = 1); 5325 void sqdecp(const Register& xdn, const PRegisterWithLaneSize& pg); 5392 void sqincp(const Register& xdn, const PRegisterWithLaneSize& pg);
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D | macro-assembler-aarch64.h | 5725 void Sqdecp(const Register& xdn, in Sqdecp() argument 5730 sqdecp(xdn, pg, wdn); in Sqdecp() 5732 void Sqdecp(const Register& xdn, const PRegisterWithLaneSize& pg) { in Sqdecp() argument 5735 sqdecp(xdn, pg); in Sqdecp() 5814 void Sqincp(const Register& xdn, in Sqincp() argument 5819 sqincp(xdn, pg, wdn); in Sqincp() 5821 void Sqincp(const Register& xdn, const PRegisterWithLaneSize& pg) { in Sqincp() argument 5824 sqincp(xdn, pg); in Sqincp()
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D | assembler-sve-aarch64.cc | 2067 void Assembler::sqdecp(const Register& xdn, const PRegisterWithLaneSize& pg) { in sqdecp() argument 2074 VIXL_ASSERT(xdn.IsX()); in sqdecp() 2076 Emit(SQDECP_r_p_r_x | SVESize(pg) | Rd(xdn) | Rx<8, 5>(pg)); in sqdecp() 2106 void Assembler::sqincp(const Register& xdn, const PRegisterWithLaneSize& pg) { in sqincp() argument 2113 VIXL_ASSERT(xdn.IsX()); in sqincp() 2115 Emit(SQINCP_r_p_r_x | SVESize(pg) | Rd(xdn) | Rx<8, 5>(pg)); in sqincp()
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