Searched refs:xo1 (Results 1 – 4 of 4) sorted by relevance
| /external/mesa3d/src/intel/isl/ |
| D | isl_tiled_memcpy.c | 316 uint32_t xo1 = (x1 % ytile_span) + (x1 / ytile_span) * bytes_per_column; in linear_to_ytiled() local
324 uint32_t swizzle1 = (xo1 >> 3) & swizzle_bit; in linear_to_ytiled()
332 uint32_t xo = xo1; in linear_to_ytiled()
353 uint32_t xo = xo1; in linear_to_ytiled()
387 uint32_t xo = xo1; in linear_to_ytiled()
480 uint32_t xo1 = (x1 % ytile_span) + (x1 / ytile_span) * bytes_per_column; in ytiled_to_linear() local
488 uint32_t swizzle1 = (xo1 >> 3) & swizzle_bit; in ytiled_to_linear()
496 uint32_t xo = xo1; in ytiled_to_linear()
517 uint32_t xo = xo1; in ytiled_to_linear()
551 uint32_t xo = xo1; in ytiled_to_linear()
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| /external/llvm-project/llvm/lib/Target/PowerPC/ |
| D | PPCInstrFormats.td | 800 class X_FRT5_XO2_XO3_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2, bits<10> xo,
807 let Inst{11-12} = xo1;
814 class X_FRT5_XO2_XO3_FRB5_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2,
822 let Inst{11-12} = xo1;
829 class X_FRT5_XO2_XO3_DRM3_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2,
837 let Inst{11-12} = xo1;
845 class X_FRT5_XO2_XO3_RM2_X10<bits<6> opcode, bits<2> xo1, bits<3> xo2,
853 let Inst{11-12} = xo1;
1177 class XX2_RD6_DCMX7_RS6<bits<6> opcode, bits<4> xo1, bits<3> xo2,
1190 let Inst{21-24} = xo1;
[all …]
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/PowerPC/ |
| D | PPCInstrFormats.td | 796 class X_FRT5_XO2_XO3_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2, bits<10> xo,
803 let Inst{11-12} = xo1;
810 class X_FRT5_XO2_XO3_FRB5_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2,
818 let Inst{11-12} = xo1;
825 class X_FRT5_XO2_XO3_DRM3_XO10<bits<6> opcode, bits<2> xo1, bits<3> xo2,
833 let Inst{11-12} = xo1;
841 class X_FRT5_XO2_XO3_RM2_X10<bits<6> opcode, bits<2> xo1, bits<3> xo2,
849 let Inst{11-12} = xo1;
1173 class XX2_RD6_DCMX7_RS6<bits<6> opcode, bits<4> xo1, bits<3> xo2,
1186 let Inst{21-24} = xo1;
[all …]
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| /external/llvm/lib/Target/PowerPC/ |
| D | PPCInstrFormats.td | 1007 class XX2_RD6_DCMX7_RS6<bits<6> opcode, bits<4> xo1, bits<3> xo2,
1020 let Inst{21-24} = xo1;
1301 class XLForm_2_and_DSForm_1<bits<6> opcode1, bits<10> xo1, bit lk,
1319 let Inst{21-30} = xo1;
1328 class XLForm_2_ext_and_DSForm_1<bits<6> opcode1, bits<10> xo1,
1333 : XLForm_2_and_DSForm_1<opcode1, xo1, lk, opcode2, xo2,
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