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Searched refs:zm (Results 1 – 25 of 83) sorted by relevance

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/external/vixl/src/aarch64/
Dmacro-assembler-sve-aarch64.cc505 const ZRegister& zm, in NoncommutativeArithmeticHelper() argument
511 (this->*fn)(zd, pg, zn, zm); in NoncommutativeArithmeticHelper()
512 } else if (zd.Aliases(zm)) { in NoncommutativeArithmeticHelper()
515 (this->*rev_fn)(zd, pg, zm, zn); in NoncommutativeArithmeticHelper()
519 (this->*fn)(zd, pg, zd, zm); in NoncommutativeArithmeticHelper()
527 const ZRegister& zm, in FPCommutativeArithmeticHelper() argument
534 (this->*fn)(zd, pg, zd, zm); in FPCommutativeArithmeticHelper()
535 } else if (zd.Aliases(zm)) { in FPCommutativeArithmeticHelper()
550 (this->*fn)(scratch, pg, scratch, zm); in FPCommutativeArithmeticHelper()
561 (this->*fn)(zd, pg, zd, zm); in FPCommutativeArithmeticHelper()
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Dassembler-sve-aarch64.cc132 const ZRegister& zm) { in and_() argument
135 VIXL_ASSERT(AreSameFormat(zd, zn, zm)); in and_()
136 Emit(AND_z_zz | Rd(zd) | Rn(zn) | Rm(zm)); in and_()
141 const ZRegister& zm) { in bic() argument
144 VIXL_ASSERT(AreSameFormat(zd, zn, zm)); in bic()
145 Emit(BIC_z_zz | Rd(zd) | Rn(zn) | Rm(zm)); in bic()
150 const ZRegister& zm) { in eor() argument
153 VIXL_ASSERT(AreSameFormat(zd, zn, zm)); in eor()
154 Emit(EOR_z_zz | Rd(zd) | Rn(zn) | Rm(zm)); in eor()
159 const ZRegister& zm) { in orr() argument
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Dmacro-assembler-aarch64.h3071 const ZRegister& zm) { \
3075 ASM(zd, pg, zd, zm); \
3076 } else if (zd.Aliases(zm)) { \
3081 ASM(zd, pg, zd, zm); \
3480 void Add(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in Add() argument
3483 add(zd, zn, zm); in Add()
3515 void And(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm) { in And() argument
3517 VIXL_ASSERT(AreSameLaneSize(zd, zn, zm)); in And()
3519 and_(zd.VnD(), zn.VnD(), zm.VnD()); in And()
3545 const ZRegister& zm);
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Dassembler-aarch64.h3598 const ZRegister& zm);
3601 void add(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
3625 const ZRegister& zm);
3631 void and_(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
3652 const ZRegister& zm);
3658 void asr(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
3670 const ZRegister& zm);
3682 const ZRegister& zm);
3688 void bic(const ZRegister& zd, const ZRegister& zn, const ZRegister& zm);
3756 const ZRegister& zm);
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Dsimulator-aarch64.cc7342 SimVRegister& zm = ReadVRegister(instr->GetRm()); in VisitSVEAddressGeneration() local
7346 mov(vform, temp, zm); in VisitSVEAddressGeneration()
7415 SimVRegister& zm = ReadVRegister(instr->GetRm()); in VisitSVEBitwiseLogicalUnpredicated() local
7439 SVEBitwiseLogicalUnpredicatedHelper(logical_op, kFormatVnD, zd, zn, zm); in VisitSVEBitwiseLogicalUnpredicated()
7493 SimVRegister& zm = ReadVRegister(instr->GetRn()); in VisitSVEBitwiseShiftByVector_Predicated() local
7502 mov(vform, shiftor, zm); in VisitSVEBitwiseShiftByVector_Predicated()
7506 mov(vform, shiftand, zm); in VisitSVEBitwiseShiftByVector_Predicated()
7512 mov(vform, shiftand, zm); in VisitSVEBitwiseShiftByVector_Predicated()
7519 mov(vform, shiftand, zm); in VisitSVEBitwiseShiftByVector_Predicated()
7542 SimVRegister& zm = ReadVRegister(instr->GetRn()); in VisitSVEBitwiseShiftByWideElements_Predicated() local
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/external/tensorflow/tensorflow/lite/g3doc/inference_with_metadata/task_library/images/
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/external/python/cpython3/PC/icons/
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Dlauncher.svg1zm-1 .2h.8v.8h-.8v-.8zm-1.139.8h-1v.2h1v-.2z"/><path class="graph-lightgrey" d="M6 5h23v2H6z"/></g…
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/external/tensorflow/tensorflow/lite/g3doc/r1/images/convert/
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/external/tensorflow/tensorflow/lite/g3doc/images/convert/
Dworkflow.svg1zm-0.296875 -6.484375q-0.859375 0 -1.375 0.5625q-0.5 0.5625 -0.59375 1.546875l3.734375 0q0 -1.0156…
/external/llvm-project/mlir/docs/includes/img/
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/external/llvm-project/libc/docs/
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/external/mesa3d/docs/
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/external/tensorflow/tensorflow/compiler/mlir/g3doc/images/
Dmlir-infra.svg1zm-12.203125 -9.671875l2.296875 0l0 1.265625l0.15625 0q0.375 -0.6875 1.140625 -1.109375q0.765625 -…
/external/rust/crates/grpcio-sys/grpc/third_party/cares/cares/
DMakefile.Watcom41 CFLAGS = -3r -mf -hc -zff -zgf -zq -zm -zc -s -fr=con -w2 -fpi -oilrtfm &
132 $(RC) $(DEBUG) -q -r -zm -I..\include $(SYS_INCL) $[@ -fo=$^@
/external/python/cpython3/Doc/library/
Dpathlib-inheritance.svg1zm-1.78125 -1.609375q-0.359375 -0.6875 -0.953125 -1.015625q-0.59375 -0.34375 -1.421875 -0.34375q-0…
/external/mesa3d/src/gallium/drivers/zink/
Dzink_program.c117 zink_destroy_shader_module(struct zink_screen *screen, struct zink_shader_module *zm) in zink_destroy_shader_module() argument
119 vkDestroyShaderModule(screen->dev, zm->shader, NULL); in zink_destroy_shader_module()
120 free(zm); in zink_destroy_shader_module()
/external/cldr/common/testData/transforms/
Dja-t-sk-fonipa.txt68 zmɪselnɔsc ズミセルノスチ

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