| /external/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 290 const TargetRegisterClass *DefRC, in shareSameRegisterFile()
320 bool TargetRegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
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| D | DetectDeadLanes.cpp | 376 const TargetRegisterClass *DefRC = MRI->getRegClass(Reg); in determineInitialDefinedLanes() local
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| D | PeepholeOptimizer.cpp | 624 const TargetRegisterClass *DefRC = MRI->getRegClass(Reg); in findNextSource() local
938 const TargetRegisterClass *DefRC = MRI.getRegClass(Def.Reg); in RewriteSource() local
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| D | RegisterCoalescer.cpp | 930 const TargetRegisterClass *DefRC = TII->getRegClass(MCID, 0, TRI, *MF); in reMaterializeTrivialDef() local
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| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 363 const TargetRegisterClass *DefRC, in shareSameRegisterFile()
393 bool TargetRegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
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| D | DetectDeadLanes.cpp | 370 const TargetRegisterClass *DefRC = MRI->getRegClass(Reg); in determineInitialDefinedLanes() local
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| D | PeepholeOptimizer.cpp | 674 const TargetRegisterClass *DefRC = MRI->getRegClass(Reg); in findNextSource() local
1237 const TargetRegisterClass *DefRC = MRI->getRegClass(Def.Reg); in rewriteSource() local
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| D | RegisterCoalescer.cpp | 1298 const TargetRegisterClass *DefRC = TII->getRegClass(MCID, 0, TRI, *MF); in reMaterializeTrivialDef() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetRegisterInfo.cpp | 343 const TargetRegisterClass *DefRC, in shareSameRegisterFile()
373 bool TargetRegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
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| D | DetectDeadLanes.cpp | 373 const TargetRegisterClass *DefRC = MRI->getRegClass(Reg); in determineInitialDefinedLanes() local
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| D | PeepholeOptimizer.cpp | 669 const TargetRegisterClass *DefRC = MRI->getRegClass(Reg); in findNextSource() local
1232 const TargetRegisterClass *DefRC = MRI->getRegClass(Def.Reg); in rewriteSource() local
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| D | RegisterCoalescer.cpp | 1284 const TargetRegisterClass *DefRC = TII->getRegClass(MCID, 0, TRI, *MF); in reMaterializeTrivialDef() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 219 bool X86RegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
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| D | X86SpeculativeLoadHardening.cpp | 2336 auto *DefRC = MRI->getRegClass(OldDefReg); in hardenPostLoad() local
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86RegisterInfo.cpp | 214 bool X86RegisterInfo::shouldRewriteCopySrc(const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
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| D | X86SpeculativeLoadHardening.cpp | 1966 auto *DefRC = MRI->getRegClass(OldDefReg); in hardenPostLoad() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsInstructionSelector.cpp | 394 const TargetRegisterClass *DefRC = nullptr; in select() local
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsInstructionSelector.cpp | 429 const TargetRegisterClass *DefRC = nullptr; in select() local
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| /external/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 808 const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 1467 const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
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| D | AMDGPUInstructionSelector.cpp | 182 const TargetRegisterClass *DefRC in selectPHI() local
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| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIRegisterInfo.cpp | 1878 const TargetRegisterClass *DefRC, in shouldRewriteCopySrc()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonConstPropagation.cpp | 1954 const TargetRegisterClass &DefRC = *MRI->getRegClass(DefR.Reg); in evaluate() local
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonConstPropagation.cpp | 1959 const TargetRegisterClass &DefRC = *MRI->getRegClass(DefR.Reg); in evaluate() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
| D | AArch64InstructionSelector.cpp | 1435 const TargetRegisterClass *DefRC in select() local
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