/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
D | X86FixupLEAs.cpp | 577 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local 615 unsigned NewOpc = in processInstrForSlow3OpLEA() local 621 unsigned NewOpc = getADDriFromLEA(MI.getOpcode(), Offset); in processInstrForSlow3OpLEA() local 648 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local 670 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local
|
D | X86EvexToVex.cpp | 147 static bool performCustomAdjustments(MachineInstr &MI, unsigned NewOpc) { in performCustomAdjustments() 259 unsigned NewOpc = I->VexOpcode; in CompressEvexToVexImpl() local
|
D | X86MCInstLower.cpp | 502 unsigned NewOpc; in Lower() local 527 unsigned NewOpc; in Lower() local 570 unsigned NewOpc; in Lower() local 642 unsigned NewOpc; in Lower() local 806 unsigned NewOpc; in Lower() local 831 unsigned NewOpc; in Lower() local
|
D | X86ISelDAGToDAG.cpp | 830 unsigned NewOpc; in PreprocessISelDAG() local 863 unsigned NewOpc; in PreprocessISelDAG() local 886 unsigned NewOpc = N->getOpcode() == ISD::ANY_EXTEND in PreprocessISelDAG() local 1260 unsigned NewOpc; in PostprocessISelDAG() local 1301 unsigned NewOpc; in PostprocessISelDAG() local 3076 unsigned NewOpc = SelectOpcode(X86::NEG64m, X86::NEG32m, X86::NEG16m, in foldLoadStoreIntoMemOperand() local 3091 unsigned NewOpc = in foldLoadStoreIntoMemOperand() local 3181 unsigned NewOpc = SelectRegOpcode(Opc); in foldLoadStoreIntoMemOperand() local 3586 unsigned NewOpc = NVT == MVT::i64 ? X86::MOV32ri64 : X86::MOV32ri; in matchBEXTRFromAndImm() local 3602 unsigned NewOpc = NVT == MVT::i64 ? X86::MOV32ri64 : X86::MOV32ri; in matchBEXTRFromAndImm() local [all …]
|
D | X86InstructionSelector.cpp | 529 unsigned NewOpc = getLoadStoreOp(Ty, RB, Opc, MemOp.getAlignment()); in selectLoadStoreOp() local 571 unsigned NewOpc = getLeaOP(Ty, STI); in selectFrameIndexOrGep() local 622 unsigned NewOpc = getLeaOP(Ty, STI); in selectGlobalValue() local 654 unsigned NewOpc; in selectConstant() local
|
/external/llvm-project/llvm/lib/Target/X86/ |
D | X86FixupLEAs.cpp | 598 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local 636 unsigned NewOpc = in processInstrForSlow3OpLEA() local 642 unsigned NewOpc = getADDriFromLEA(MI.getOpcode(), Offset); in processInstrForSlow3OpLEA() local 670 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local 693 unsigned NewOpc = getADDrrFromLEA(MI.getOpcode()); in processInstrForSlow3OpLEA() local
|
D | X86EvexToVex.cpp | 149 static bool performCustomAdjustments(MachineInstr &MI, unsigned NewOpc, in performCustomAdjustments() 278 unsigned NewOpc = I->VexOpcode; in CompressEvexToVexImpl() local
|
D | X86MCInstLower.cpp | 517 unsigned NewOpc; in Lower() local 549 unsigned NewOpc; in Lower() local 574 unsigned NewOpc; in Lower() local 617 unsigned NewOpc; in Lower() local 689 unsigned NewOpc; in Lower() local 853 unsigned NewOpc; in Lower() local 878 unsigned NewOpc; in Lower() local
|
D | X86InstructionSelector.cpp | 530 unsigned NewOpc = getLoadStoreOp(Ty, RB, Opc, MemOp.getAlign()); in selectLoadStoreOp() local 572 unsigned NewOpc = getLeaOP(Ty, STI); in selectFrameIndexOrGep() local 623 unsigned NewOpc = getLeaOP(Ty, STI); in selectGlobalValue() local 655 unsigned NewOpc; in selectConstant() local
|
D | X86ISelDAGToDAG.cpp | 990 unsigned NewOpc; in PreprocessISelDAG() local 1023 unsigned NewOpc; in PreprocessISelDAG() local 1045 unsigned NewOpc; in PreprocessISelDAG() local 1435 unsigned NewOpc; in PostprocessISelDAG() local 1478 unsigned NewOpc; in PostprocessISelDAG() local 3174 unsigned NewOpc = SelectOpcode(X86::NEG64m, X86::NEG32m, X86::NEG16m, in foldLoadStoreIntoMemOperand() local 3189 unsigned NewOpc = in foldLoadStoreIntoMemOperand() local 3279 unsigned NewOpc = SelectRegOpcode(Opc); in foldLoadStoreIntoMemOperand() local 3685 unsigned NewOpc = NVT == MVT::i64 ? X86::MOV32ri64 : X86::MOV32ri; in matchBEXTRFromAndImm() local 3701 unsigned NewOpc = NVT == MVT::i64 ? X86::MOV32ri64 : X86::MOV32ri; in matchBEXTRFromAndImm() local [all …]
|
/external/capstone/arch/X86/ |
D | X86Disassembler.c | 204 unsigned NewOpc = 0; in translateImmediate() local 243 unsigned NewOpc = 0; in translateImmediate() local 279 unsigned NewOpc = 0; in translateImmediate() local
|
/external/llvm/lib/Target/X86/Disassembler/ |
D | X86Disassembler.cpp | 418 unsigned NewOpc; in translateImmediate() local 452 unsigned NewOpc; in translateImmediate() local 483 unsigned NewOpc; in translateImmediate() local
|
/external/llvm-project/llvm/lib/Target/AArch64/GISel/ |
D | AArch64PostSelectOptimize.cpp | 137 unsigned NewOpc = getNonFlagSettingVariant(II.getOpcode()); in optimizeNZCVDefs() local
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/ |
D | ARMLoadStoreOptimizer.cpp | 1323 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); in MergeBaseUpdateLSMultiple() local 1423 unsigned NewOpc; in MergeBaseUpdateLoadStore() local 1535 unsigned NewOpc; in MergeBaseUpdateLSDouble() local 1629 bool isDef, unsigned NewOpc, unsigned Reg, in InsertLDR_STR() 1701 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local 1725 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local 1953 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); in MergeReturnIntoLDM() local 2148 DebugLoc &dl, unsigned &NewOpc, in CanFormLdStDWord() 2320 unsigned NewOpc = 0; in RescheduleOps() local
|
D | Thumb2InstrInfo.cpp | 531 unsigned NewOpc = isSub ? IsSP ? ARM::t2SUBspImm12 : ARM::t2SUBri12 in rewriteT2FrameIndex() local 564 unsigned NewOpc = Opcode; in rewriteT2FrameIndex() local
|
D | ARMExpandPseudoInsts.cpp | 1273 unsigned NewOpc = AFI->isThumbFunction() ? ARM::t2MOVi16 : ARM::MOVi16; in ExpandMI() local 1315 unsigned NewOpc; in ExpandMI() local 1588 unsigned NewOpc = ARM::VLDMDIA; in ExpandMI() local 1619 unsigned NewOpc = ARM::VSTMDIA; in ExpandMI() local
|
/external/llvm/lib/Target/ARM/ |
D | ARMLoadStoreOptimizer.cpp | 1261 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); in MergeBaseUpdateLSMultiple() local 1361 unsigned NewOpc; in MergeBaseUpdateLoadStore() local 1457 unsigned NewOpc; in MergeBaseUpdateLSDouble() local 1551 bool isDef, const DebugLoc &DL, unsigned NewOpc, in InsertLDR_STR() 1616 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local 1638 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local 1875 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); in MergeReturnIntoLDM() local 2056 DebugLoc &dl, unsigned &NewOpc, in CanFormLdStDWord() 2221 unsigned NewOpc = 0; in RescheduleOps() local
|
D | Thumb2InstrInfo.cpp | 504 unsigned NewOpc = isSub ? ARM::t2SUBri12 : ARM::t2ADDri12; in rewriteT2FrameIndex() local 538 unsigned NewOpc = Opcode; in rewriteT2FrameIndex() local
|
D | ARMExpandPseudoInsts.cpp | 1097 unsigned NewOpc = AFI->isThumbFunction() ? ARM::t2MOVi16 : ARM::MOVi16; in ExpandMI() local 1136 unsigned NewOpc; in ExpandMI() local 1380 unsigned NewOpc = ARM::VLDMDIA; in ExpandMI() local 1411 unsigned NewOpc = ARM::VSTMDIA; in ExpandMI() local
|
/external/llvm-project/llvm/lib/Target/ARM/ |
D | ARMLoadStoreOptimizer.cpp | 1325 unsigned NewOpc = getUpdatingLSMultipleOpcode(Opcode, Mode); in MergeBaseUpdateLSMultiple() local 1475 unsigned NewOpc; in MergeBaseUpdateLoadStore() local 1587 unsigned NewOpc; in MergeBaseUpdateLSDouble() local 1681 bool isDef, unsigned NewOpc, unsigned Reg, in InsertLDR_STR() 1753 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local 1777 unsigned NewOpc = (isLd) in FixInvalidRegPairOp() local 2005 unsigned NewOpc = (isThumb2 ? ARM::t2LDMIA_RET : ARM::LDMIA_RET); in MergeReturnIntoLDM() local 2206 MachineInstr *Op0, MachineInstr *Op1, DebugLoc &dl, unsigned &NewOpc, in CanFormLdStDWord() 2374 unsigned NewOpc = 0; in RescheduleOps() local
|
D | ARMExpandPseudoInsts.cpp | 1879 unsigned NewOpc = Opcode == ARM::VBSPd ? ARM::VBITd : ARM::VBITq; in ExpandMI() local 1889 unsigned NewOpc = Opcode == ARM::VBSPd ? ARM::VBIFd : ARM::VBIFq; in ExpandMI() local 1899 unsigned NewOpc = Opcode == ARM::VBSPd ? ARM::VBSLd : ARM::VBSLq; in ExpandMI() local 2150 unsigned NewOpc = AFI->isThumbFunction() ? ARM::t2MOVi16 : ARM::MOVi16; in ExpandMI() local 2192 unsigned NewOpc; in ExpandMI() local 2469 unsigned NewOpc = ARM::VLDMDIA; in ExpandMI() local 2500 unsigned NewOpc = ARM::VSTMDIA; in ExpandMI() local
|
D | Thumb2InstrInfo.cpp | 578 unsigned NewOpc = isSub ? IsSP ? ARM::t2SUBspImm12 : ARM::t2SUBri12 in rewriteT2FrameIndex() local 611 unsigned NewOpc = Opcode; in rewriteT2FrameIndex() local
|
/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64CondBrTuning.cpp | 100 unsigned NewOpc = TII->convertToFlagSettingOpc(MI.getOpcode(), Is64Bit); in convertToFlagSetting() local
|
/external/llvm/lib/Target/X86/ |
D | X86MCInstLower.cpp | 427 unsigned NewOpc; in Lower() local 452 unsigned NewOpc; in Lower() local 615 unsigned NewOpc; in Lower() local 640 unsigned NewOpc; in Lower() local
|
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64CondBrTuning.cpp | 100 unsigned NewOpc = TII->convertToFlagSettingOpc(MI.getOpcode(), Is64Bit); in convertToFlagSetting() local
|