| /external/llvm/lib/Transforms/InstCombine/ |
| D | InstCombineShifts.cpp | 543 BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0); in FoldShiftByConstant() local
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| /external/swiftshader/third_party/subzero/src/ |
| D | IceInstARM32.h | 160 ShiftKind ShiftOp; variable
311 ShiftKind ShiftOp, Operand *ShiftAmt) { in create()
334 ShiftKind ShiftOp; variable
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| D | IceInstARM32.cpp | 331 Variable *Index, ShiftKind ShiftOp, in OperandARM32Mem()
471 ShiftKind ShiftOp, Operand *ShiftAmt) in OperandARM32FlexReg()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 692 unsigned ShiftOp; in PromoteIntRes_ADDSUBSAT() local
776 unsigned ShiftOp = Signed ? ISD::SRA : ISD::SRL; in PromoteIntRes_MULFIX() local
3354 SDValue ShiftOp = N->getOperand(1); in ExpandIntRes_Shift() local
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| D | DAGCombiner.cpp | 2052 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubOfSignBit() local
6473 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); in calculateByteProvider() local
7245 const APInt *&ShiftAmtVal) { in combineShiftOfShiftedLogic()
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| D | SelectionDAGBuilder.cpp | 2719 SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), dl, Reg, VT); in visitBitTestCase() local
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| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 757 unsigned ShiftOp; in PromoteIntRes_ADDSUBSHLSAT() local
844 unsigned ShiftOp = Signed ? ISD::SRA : ISD::SRL; in PromoteIntRes_MULFIX() local
3719 SDValue ShiftOp = N->getOperand(1); in ExpandIntRes_Shift() local
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| D | DAGCombiner.cpp | 2236 SDValue ShiftOp = IsAdd ? N->getOperand(0) : N->getOperand(1); in foldAddSubOfSignBit() local
6988 auto ShiftOp = dyn_cast<ConstantSDNode>(Op->getOperand(1)); in calculateByteProvider() local
7803 const APInt *&ShiftAmtVal) { in combineShiftOfShiftedLogic()
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| D | SelectionDAGBuilder.cpp | 2693 SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), dl, Reg, VT); in visitBitTestCase() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 1859 unsigned ShiftOp = TrueOp->getSExtValue() == 1 ? ISD::SRL : ISD::SRA; in expandSelectBoolean() local
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| /external/llvm-project/llvm/lib/Target/SystemZ/ |
| D | SystemZISelDAGToDAG.cpp | 1904 unsigned ShiftOp = TrueOp->getSExtValue() == 1 ? ISD::SRL : ISD::SRA; in expandSelectBoolean() local
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| /external/capstone/arch/ARM/ |
| D | ARMInstPrinter.c | 1436 unsigned ShiftOp = (unsigned int)MCOperand_getImm(MCInst_getOperand(MI, OpNum)); in printShiftImmOperand() local
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| /external/llvm/lib/Target/ARM/InstPrinter/ |
| D | ARMInstPrinter.cpp | 694 unsigned ShiftOp = MI->getOperand(OpNum).getImm(); in printShiftImmOperand() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMInstPrinter.cpp | 774 unsigned ShiftOp = MI->getOperand(OpNum).getImm(); in printShiftImmOperand() local
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| /external/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 3228 unsigned ShiftOp = Subtarget.isABI_N64() ? Mips::DSLL : Mips::SLL; in emitINSERT_DF_VIDX() local
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| /external/llvm-project/llvm/lib/Target/ARM/MCTargetDesc/ |
| D | ARMInstPrinter.cpp | 774 unsigned ShiftOp = MI->getOperand(OpNum).getImm(); in printShiftImmOperand() local
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| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 3341 unsigned ShiftOp = Subtarget.isABI_N64() ? Mips::DSLL : Mips::SLL; in emitINSERT_DF_VIDX() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | MipsSEISelLowering.cpp | 3342 unsigned ShiftOp = Subtarget.isABI_N64() ? Mips::DSLL : Mips::SLL; in emitINSERT_DF_VIDX() local
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | LegalizeIntegerTypes.cpp | 2362 SDValue ShiftOp = N->getOperand(1); in ExpandIntRes_Shift() local
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| D | SelectionDAGBuilder.cpp | 2201 SDValue ShiftOp = DAG.getCopyFromReg(getControlRoot(), dl, Reg, VT); in visitBitTestCase() local
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| /external/llvm-project/llvm/lib/CodeGen/GlobalISel/ |
| D | LegalizerHelper.cpp | 6198 unsigned ShiftOp = IsSigned ? TargetOpcode::G_ASHR : TargetOpcode::G_LSHR; in lowerSMULH_UMULH() local
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| /external/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 28576 SDValue ShiftOp = Shift.getOperand(0); in foldXorTruncShiftIntoCmp() local
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 40859 SDValue ShiftOp = Shift.getOperand(0); in foldXorTruncShiftIntoCmp() local
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| /external/llvm-project/llvm/lib/Target/X86/ |
| D | X86ISelLowering.cpp | 44064 SDValue ShiftOp = Shift.getOperand(0); in foldXorTruncShiftIntoCmp() local
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