| /external/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 202 struct SpilledReg Spill; in getSpilledReg() local
|
| D | SIRegisterInfo.cpp | 528 struct SIMachineFunctionInfo::SpilledReg Spill = in eliminateFrameIndex() local
592 struct SIMachineFunctionInfo::SpilledReg Spill = in eliminateFrameIndex() local
|
| /external/llvm/lib/CodeGen/ |
| D | RegAllocBasic.cpp | 191 LiveInterval &Spill = *Intfs[i]; in spillInterferences() local
|
| D | InlineSpiller.cpp | 1054 void HoistSpillHelper::addToMergeableSpills(MachineInstr &Spill, int StackSlot, in addToMergeableSpills()
1066 bool HoistSpillHelper::rmFromMergeableSpills(MachineInstr &Spill, in rmFromMergeableSpills()
1164 for (const auto Spill : Spills) { in getVisitOrders() local
|
| /external/llvm-project/llvm/lib/Target/AMDGPU/ |
| D | SIFrameLowering.cpp | 985 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill = in emitPrologue() local
1003 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill = in emitPrologue() local
1157 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill = in emitEpilogue() local
1182 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill = in emitEpilogue() local
|
| D | SIMachineFunctionInfo.cpp | 378 auto &Spill = VGPRToAGPRSpills[FI]; in allocateVGPRSpillToAGPR() local
|
| D | SIRegisterInfo.cpp | 1095 SIMachineFunctionInfo::SpilledReg Spill = VGPRSpills[i]; in spillSGPR() local
1216 SIMachineFunctionInfo::SpilledReg Spill = VGPRSpills[i]; in restoreSGPR() local
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | RegAllocBasic.cpp | 232 LiveInterval &Spill = *Intfs[i]; in spillInterferences() local
|
| D | InlineSpiller.cpp | 979 MachineBasicBlock::iterator Spill = std::next(MI); in insertSpill() local
1168 void HoistSpillHelper::addToMergeableSpills(MachineInstr &Spill, int StackSlot, in addToMergeableSpills()
1187 bool HoistSpillHelper::rmFromMergeableSpills(MachineInstr &Spill, in rmFromMergeableSpills()
1281 for (const auto Spill : Spills) { in getVisitOrders() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | RegAllocBasic.cpp | 227 LiveInterval &Spill = *Intfs[i]; in spillInterferences() local
|
| D | InlineSpiller.cpp | 1138 void HoistSpillHelper::addToMergeableSpills(MachineInstr &Spill, int StackSlot, in addToMergeableSpills()
1157 bool HoistSpillHelper::rmFromMergeableSpills(MachineInstr &Spill, in rmFromMergeableSpills()
1251 for (const auto Spill : Spills) { in getVisitOrders() local
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | FunctionLoweringInfo.h | 101 Spill, enumerator
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AMDGPU/ |
| D | SIMachineFunctionInfo.cpp | 332 auto &Spill = VGPRToAGPRSpills[FI]; in allocateVGPRSpillToAGPR() local
|
| D | SIFrameLowering.cpp | 756 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill in emitPrologue() local
860 ArrayRef<SIMachineFunctionInfo::SpilledReg> Spill in emitEpilogue() local
|
| D | SIRegisterInfo.cpp | 791 SIMachineFunctionInfo::SpilledReg Spill = VGPRSpills[i]; in spillSGPR() local
892 SIMachineFunctionInfo::SpilledReg Spill = VGPRSpills[i]; in restoreSGPR() local
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Transforms/Coroutines/ |
| D | CoroFrame.cpp | 289 class Spill { class
295 Spill(Value *Def, llvm::User *U) : Def(Def), User(cast<Instruction>(U)) {} in Spill() function in __anon0137a4710511::Spill
|
| /external/llvm-project/llvm/lib/CodeGen/LiveDebugValues/ |
| D | InstrRefBasedImpl.cpp | 770 const SpillLoc &Spill = SpillLocs[LocID - NumRegs + 1]; in emitLoc() local
|