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Searched defs:SubIdx (Results 1 – 25 of 97) sorted by relevance

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/external/llvm-project/llvm/lib/CodeGen/
DDetectDeadLanes.cpp239 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); in transferUsedLanes() local
243 unsigned SubIdx = MI.getOperand(3).getImm(); in transferUsedLanes() local
263 unsigned SubIdx = MI.getOperand(2).getImm(); in transferUsedLanes() local
313 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); in transferDefinedLanes() local
319 unsigned SubIdx = MI.getOperand(3).getImm(); in transferDefinedLanes() local
331 unsigned SubIdx = MI.getOperand(2).getImm(); in transferDefinedLanes() local
DExpandPostRAPseudos.cpp86 unsigned SubIdx = MI->getOperand(3).getImm(); in LowerSubregToReg() local
/external/llvm/lib/CodeGen/
DDetectDeadLanes.cpp245 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); in transferUsedLanes() local
249 unsigned SubIdx = MI.getOperand(3).getImm(); in transferUsedLanes() local
269 unsigned SubIdx = MI.getOperand(2).getImm(); in transferUsedLanes() local
319 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); in transferDefinedLanes() local
325 unsigned SubIdx = MI.getOperand(3).getImm(); in transferDefinedLanes() local
337 unsigned SubIdx = MI.getOperand(2).getImm(); in transferDefinedLanes() local
DExpandPostRAPseudos.cpp90 unsigned SubIdx = MI->getOperand(3).getImm(); in LowerSubregToReg() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DDetectDeadLanes.cpp242 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); in transferUsedLanes() local
246 unsigned SubIdx = MI.getOperand(3).getImm(); in transferUsedLanes() local
266 unsigned SubIdx = MI.getOperand(2).getImm(); in transferUsedLanes() local
316 unsigned SubIdx = MI.getOperand(OpNum + 1).getImm(); in transferDefinedLanes() local
322 unsigned SubIdx = MI.getOperand(3).getImm(); in transferDefinedLanes() local
334 unsigned SubIdx = MI.getOperand(2).getImm(); in transferDefinedLanes() local
DExpandPostRAPseudos.cpp86 unsigned SubIdx = MI->getOperand(3).getImm(); in LowerSubregToReg() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DThumbRegisterInfo.cpp64 unsigned SubIdx, int Val, in emitThumb1LoadConstPool()
84 unsigned SubIdx, int Val, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
/external/llvm-project/llvm/lib/Target/ARM/
DThumbRegisterInfo.cpp64 unsigned SubIdx, int Val, in emitThumb1LoadConstPool()
84 unsigned SubIdx, int Val, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, Register DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
/external/llvm/lib/Target/ARM/
DThumbRegisterInfo.cpp65 unsigned SubIdx, int Val, in emitThumb1LoadConstPool()
85 unsigned SubIdx, int Val, in emitThumb2LoadConstPool()
105 const DebugLoc &dl, unsigned DestReg, unsigned SubIdx, int Val, in emitLoadConstPool()
/external/llvm/lib/Target/AMDGPU/
DSIMachineFunctionInfo.cpp187 unsigned SubIdx) { in getSpilledReg()
/external/llvm/lib/MC/
DMCRegisterInfo.cpp18 unsigned MCRegisterInfo::getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg()
/external/llvm-project/llvm/lib/MC/
DMCRegisterInfo.cpp24 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/MC/
DMCRegisterInfo.cpp24 MCRegisterInfo::getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg()
/external/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp444 unsigned InstrEmitter::ConstrainForSubReg(unsigned VReg, unsigned SubIdx, in ConstrainForSubReg()
493 unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue(); in EmitSubregNode() local
534 unsigned SubIdx = cast<ConstantSDNode>(N2)->getZExtValue(); in EmitSubregNode() local
626 unsigned SubIdx = cast<ConstantSDNode>(Op)->getZExtValue(); in EmitRegSequence() local
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp449 unsigned InstrEmitter::ConstrainForSubReg(unsigned VReg, unsigned SubIdx, in ConstrainForSubReg()
498 unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue(); in EmitSubregNode() local
553 unsigned SubIdx = cast<ConstantSDNode>(N2)->getZExtValue(); in EmitSubregNode() local
652 unsigned SubIdx = cast<ConstantSDNode>(Op)->getZExtValue(); in EmitRegSequence() local
/external/llvm-project/llvm/lib/CodeGen/SelectionDAG/
DInstrEmitter.cpp448 Register InstrEmitter::ConstrainForSubReg(Register VReg, unsigned SubIdx, in ConstrainForSubReg()
497 unsigned SubIdx = cast<ConstantSDNode>(Node->getOperand(1))->getZExtValue(); in EmitSubregNode() local
553 unsigned SubIdx = cast<ConstantSDNode>(N2)->getZExtValue(); in EmitSubregNode() local
652 unsigned SubIdx = cast<ConstantSDNode>(Op)->getZExtValue(); in EmitRegSequence() local
/external/capstone/
DMCRegisterInfo.c86 unsigned MCRegisterInfo_getMatchingSuperReg(const MCRegisterInfo *RI, unsigned Reg, unsigned SubIdx… in MCRegisterInfo_getMatchingSuperReg()
/external/llvm/utils/TableGen/
DCodeGenRegisters.h349 getSubClassWithSubReg(const CodeGenSubRegIndex *SubIdx) const { in getSubClassWithSubReg()
353 void setSubClassWithSubReg(const CodeGenSubRegIndex *SubIdx, in setSubClassWithSubReg()
364 void addSuperRegClass(CodeGenSubRegIndex *SubIdx, in addSuperRegClass()
/external/llvm/include/llvm/Target/
DTargetRegisterInfo.h370 const char *getSubRegIndexName(unsigned SubIdx) const { in getSubRegIndexName()
380 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask()
499 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg()
/external/llvm-project/llvm/utils/TableGen/
DCodeGenRegisters.h384 getSubClassWithSubReg(const CodeGenSubRegIndex *SubIdx) const { in getSubClassWithSubReg()
400 void setSubClassWithSubReg(const CodeGenSubRegIndex *SubIdx, in setSubClassWithSubReg()
411 void addSuperRegClass(CodeGenSubRegIndex *SubIdx, in addSuperRegClass()
DCodeGenRegisters.cpp134 CodeGenSubRegIndex *SubIdx = *I; in computeConcatTransitiveClosure() local
537 CodeGenSubRegIndex *SubIdx = getSubRegIndex(SI->second); in computeSecondarySubRegs() local
1081 void CodeGenRegisterClass::getSuperRegClasses(const CodeGenSubRegIndex *SubIdx, in getSuperRegClasses()
1850 for (unsigned SubIdx = 0, EndIdx = RegUnitSets.size(); in pruneUnitSets() local
2211 for (const auto &SubIdx : SubRegIndices) { in inferSubClassWithSubReg() local
2245 for (auto &SubIdx : SubRegIndices) { in inferMatchingSuperRegClass() local
/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h338 const char *getSubRegIndexName(unsigned SubIdx) const { in getSubRegIndexName()
348 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask()
516 unsigned getMatchingSuperReg(unsigned Reg, unsigned SubIdx, in getMatchingSuperReg()
/external/llvm-project/llvm/lib/Target/X86/
DX86InstructionSelector.cpp205 unsigned SubIdx = X86::NoSubRegister; in getSubRegIndex() local
743 unsigned SubIdx; in selectTruncOrPtrToInt() local
1156 unsigned SubIdx = X86::NoSubRegister; in emitExtractSubreg() local
1194 unsigned SubIdx = X86::NoSubRegister; in emitInsertSubreg() local
/external/llvm-project/llvm/include/llvm/CodeGen/
DTargetRegisterInfo.h344 const char *getSubRegIndexName(unsigned SubIdx) const { in getSubRegIndexName()
354 LaneBitmask getSubRegIndexLaneMask(unsigned SubIdx) const { in getSubRegIndexLaneMask()
535 MCRegister getMatchingSuperReg(MCRegister Reg, unsigned SubIdx, in getMatchingSuperReg()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/X86/
DX86InstructionSelector.cpp204 unsigned SubIdx = X86::NoSubRegister; in getSubRegIndex() local
742 unsigned SubIdx; in selectTruncOrPtrToInt() local
1201 unsigned SubIdx = X86::NoSubRegister; in emitExtractSubreg() local
1239 unsigned SubIdx = X86::NoSubRegister; in emitInsertSubreg() local

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