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/external/javassist/src/test/test3/
DSwitch.java13 int j = 4; in foo()
14 j = 4; in foo()
15 j = 4; in foo()
16 j = 4; in foo()
17 j = 4; in foo()
18 j = 4; in foo()
19 j = 4; in foo()
20 j = 4; in foo()
21 j = 4; in foo()
22 j = 4; in foo()
[all …]
/external/rust/crates/bstr/src/unicode/fsm/
Dword_break_fwd.littleendian.dfa9 …�����L�l����""��������������������������������������������,��4��<��D��L��Z��n�…
13 …4��H��P��X��f��"��j��������V��.������__���������������������������������������������…
14 ��b0��4��� ���4��� ���4��� ���4��X��r3��3��3��3�����3�4��3�Ώ��3�L4�`4�����X����…
Dword_break_fwd.bigendian.dfa9 …����L�l���""�����������������������������������������������,��4��<��D��L��Z��n�…
13 …4��H��P��X��f��"��j��������V��.����__�����������������������������������������������…
14 ��0b��4��� ���4��� ���4��� ���4���X�3r�3��3��3�����3��4�3�����3��4L�4`�������X�…
/external/libxaac/decoder/armv8/
Dixheaacd_post_twiddle.s57 MOV x6, #4
58 dup v10.4h, w4
65 dup v10.4h, w4
72 LDR w7, [x1], #4
73 LDR w8, [x1], #4
107 SUB x7, x7, #4
109 STR w11, [x7], #-4
111 STR w9, [x0], #4
119 ASR w3, w3, #4
139 LD4 {v0.4h, v1.4h, v2.4h, v3.4h}, [x5], x8
[all …]
Dixheaacd_pre_twiddle.s59 LSL x7, x4, #4
61 SUB x7, x7, #4
77 LDR w8, [x3], #4
78 LDR w9, [x0], #4
93 LDR w10, [x1], #-4
121 STR w9, [x2], #4
122 STR w11, [x2], #4
126 MOV X6, #4
154 dup v14.4s, w5
163 rev64 v10.4h, v8.4h
[all …]
Dixheaacd_imdct_using_fft.s69 MOv X8, #4
172 ADD v8.4S, v0.4S, v4.4S
177 SUB v9.4S, v0.4S, v4.4S
182 ADD v0.4S, v1.4S, v5.4S
186 SUB v4.4S, v1.4S, v5.4S
190 ADD X4, X4, #4
198 ADD v1.4S, v2.4S, v6.4S
202 SUB v5.4S, v2.4S, v6.4S
206 ADD v2.4S, v3.4S, v7.4S
210 SUB v6.4S, v3.4S, v7.4S
[all …]
Dixheaacd_sbr_imdct_using_fft.s142 ADD V8.4S, V0.4S, V4.4S
147 SUB V9.4S, V0.4S, V4.4S
152 ADD V0.4S, V1.4S, V5.4S
156 SUB V4.4S, V1.4S, V5.4S
160 ADD X4, X4, #4
168 ADD V1.4S, V2.4S, V6.4S
172 SUB V5.4S, V2.4S, V6.4S
176 ADD V2.4S, V3.4S, V7.4S
180 SUB V6.4S, V3.4S, V7.4S
183 ADD V3.4S, V9.4S, V6.4S
[all …]
/external/linux-kselftest/tools/testing/selftests/powerpc/lib/
Dreg.S17 ld 18, 4*8(3)
39 std 18, 4*8(3)
58 lfs 0, 0*4(3)
59 lfs 1, 1*4(3)
60 lfs 2, 2*4(3)
61 lfs 3, 3*4(3)
62 lfs 4, 4*4(3)
63 lfs 5, 5*4(3)
64 lfs 6, 6*4(3)
65 lfs 7, 7*4(3)
[all …]
/external/gemmlowp/meta/
Dtransform_kernels_arm_64.h41 "dup v4.4s, %w[input_range_min]\n" in Transform()
42 "dup v5.4s, %w[output_range_min]\n" in Transform()
43 "dup v6.4s, %w[input_range_offset]\n" in Transform()
44 "dup v7.4s, %w[input_range_scale]\n" in Transform()
45 "dup v8.4s, %w[one_over_output_range_scale]\n" in Transform()
46 "fsub v4.4s, v4.4s, v5.4s\n" in Transform()
52 "ld1 {v0.4s, v1.4s, v2.4s, v3.4s}, [%x[input]], #64\n" in Transform()
54 "scvtf v0.4s, v0.4s\n" in Transform()
55 "scvtf v1.4s, v1.4s\n" in Transform()
56 "scvtf v2.4s, v2.4s\n" in Transform()
[all …]
/external/llvm-project/llvm/test/CodeGen/AArch64/
Dminmax-of-minmax.ll4 ; There are 4 commuted variants (abbc/abcb/bcab/bcba) *
5 ; 4 predicate variants ([*][lg][te]) *
6 ; 4 min/max flavors (smin/smax/umin/umax) *
10 define <4 x i32> @smin_ab_bc(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
13 ; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
14 ; CHECK-NEXT: smin v1.4s, v1.4s, v2.4s
15 ; CHECK-NEXT: smin v0.4s, v0.4s, v1.4s
17 %cmp_ab = icmp slt <4 x i32> %a, %b
18 %min_ab = select <4 x i1> %cmp_ab, <4 x i32> %a, <4 x i32> %b
19 %cmp_bc = icmp slt <4 x i32> %b, %c
[all …]
/external/libhevc/common/arm64/
Dihevc_itrans_recon_32x32.s125 //d5[3]= 38 d7[3]=4
128 .align 4
169 ld1 {v0.4h, v1.4h, v2.4h, v3.4h},[x14],#32
170 ld1 {v4.4h, v5.4h, v6.4h, v7.4h},[x14],#32
195 mov x20,#4
208 ld1 {v10.4h},[x0],x6
209 ld1 {v8.4h},[x0],x6
210 ld1 {v11.4h},[x0],x6
211 ld1 {v9.4h},[x0],x6
213 smull v24.4s, v8.4h, v0.h[1] //// y1 * cos1(part of b0)
[all …]
/external/llvm/test/CodeGen/PowerPC/
D2007-03-30-SpillerCrash.ll3 define void @test(<4 x float>*, { { i16, i16, i32 } }*) {
5 …%.sub7896 = getelementptr [4 x <4 x i32>], [4 x <4 x i32>]* null, i32 0, i32 0 ; <<4 x i32>*> [#u…
6 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 175, i32 3 ;…
7 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 2 ;…
8 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 3 ;…
9 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 1 ;…
10 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 2 ;…
11 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 3 ;…
12 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 1 ;…
13 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 2 ;…
[all …]
/external/llvm-project/llvm/test/CodeGen/PowerPC/
D2007-03-30-SpillerCrash.ll3 define void @test(<4 x float>*, { { i16, i16, i32 } }*) {
5 …%.sub7896 = getelementptr [4 x <4 x i32>], [4 x <4 x i32>]* null, i32 0, i32 0 ; <<4 x i32>*> [#u…
6 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 175, i32 3 ;…
7 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 2 ;…
8 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 174, i32 3 ;…
9 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 1 ;…
10 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 2 ;…
11 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 173, i32 3 ;…
12 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 1 ;…
13 …getelementptr [193 x [4 x <4 x float>]], [193 x [4 x <4 x float>]]* null, i32 0, i32 172, i32 2 ;…
[all …]
/external/XNNPACK/src/f32-gemm/gen/
D6x8-minmax-aarch64-neonfma-cortex-a75.S80 CMP x0, 4 // if mr < 4
89 // if mr <= 4
125 B.LO 4f
134 LDP q12, q13, [x5], 32 // Fetch 3 B (4th deferred)
145 # First group of 4 A. 48 FMA.
146 FMLA v20.4s, v12.4s, v0.s[0]
148 FMLA v22.4s, v12.4s, v1.s[0]
149 FMLA v24.4s, v12.4s, v2.s[0]
150 FMLA v26.4s, v12.4s, v3.s[0]
151 FMLA v28.4s, v12.4s, v4.s[0]
[all …]
D6x8-minmax-aarch64-neonfma-cortex-a57.S80 CMP x0, 4 // if mr < 4
89 // if mr <= 4
115 B.LO 4f
124 LDP q12, q13, [x5], 32 // Fetch 3 B (4th deferred)
135 # First group of 4 A. 48 FMA.
136 FMLA v20.4s, v12.4s, v0.s[0]
138 FMLA v22.4s, v12.4s, v1.s[0]
139 FMLA v24.4s, v12.4s, v2.s[0]
140 FMLA v26.4s, v12.4s, v3.s[0]
141 FMLA v28.4s, v12.4s, v4.s[0]
[all …]
D6x8-minmax-aarch64-neonfma-cortex-a73.S80 CMP x0, 4 // if mr < 4
89 // if mr <= 4
126 B.LO 4f
147 # First group of 4 A. 48 FMA. Loads A5
150 FMLA v20.4s, v12.4s, v0.s[0]
151 FMLA v22.4s, v12.4s, v1.s[0]
153 FMLA v24.4s, v12.4s, v2.s[0]
154 FMLA v26.4s, v12.4s, v3.s[0]
156 FMLA v28.4s, v12.4s, v4.s[0]
157 FMLA v30.4s, v12.4s, v5.s[0]
[all …]
/external/XNNPACK/src/f32-gemm/gen-inc/
D6x8inc-minmax-aarch64-neonfma-cortex-a57.S81 CMP x0, 4 // if mr < 4
90 // if mr <= 4
111 B.LO 4f
120 LDP q12, q13, [x5], 32 // Fetch 3 B (4th deferred)
131 # First group of 4 A. 48 FMA.
132 FMLA v20.4s, v12.4s, v0.s[0]
134 FMLA v22.4s, v12.4s, v1.s[0]
135 FMLA v24.4s, v12.4s, v2.s[0]
136 FMLA v26.4s, v12.4s, v3.s[0]
137 FMLA v28.4s, v12.4s, v4.s[0]
[all …]
D6x8inc-minmax-aarch64-neonfma-cortex-a75.S81 CMP x0, 4 // if mr < 4
90 // if mr <= 4
121 B.LO 4f
130 LDP q12, q13, [x5], 32 // Fetch 3 B (4th deferred)
141 # First group of 4 A. 48 FMA.
142 FMLA v20.4s, v12.4s, v0.s[0]
144 FMLA v22.4s, v12.4s, v1.s[0]
145 FMLA v24.4s, v12.4s, v2.s[0]
146 FMLA v26.4s, v12.4s, v3.s[0]
147 FMLA v28.4s, v12.4s, v4.s[0]
[all …]
D6x8inc-minmax-aarch64-neonfma-cortex-a73.S81 CMP x0, 4 // if mr < 4
90 // if mr <= 4
122 B.LO 4f
143 # First group of 4 A. 48 FMA. Loads A5
146 FMLA v20.4s, v12.4s, v0.s[0]
147 FMLA v22.4s, v12.4s, v1.s[0]
149 FMLA v24.4s, v12.4s, v2.s[0]
150 FMLA v26.4s, v12.4s, v3.s[0]
152 FMLA v28.4s, v12.4s, v4.s[0]
153 FMLA v30.4s, v12.4s, v5.s[0]
[all …]
D5x8inc-minmax-aarch64-neonfma-cortex-a57.S85 CMP x0, 4 // if mr < 4
93 // if mr <= 4
98 LD2R {v30.4s, v31.4s}, [x8]
110 B.LO 4f
118 LDP q12, q13, [x5], 32 // Fetch 3 B (4th deferred)
129 # First group of 4 A. 40 FMA.
130 FMLA v20.4s, v12.4s, v0.s[0]
132 FMLA v22.4s, v12.4s, v2.s[0]
133 FMLA v24.4s, v12.4s, v4.s[0]
134 FMLA v26.4s, v12.4s, v6.s[0]
[all …]
/external/XNNPACK/src/f32-igemm/
D6x8-minmax-aarch64-neonfma-cortex-a73.S77 CMP x0, 4 // if mr < 4
83 // if mr <= 4
101 LD2R {v6.4s, v7.4s}, [x8]
170 # First group of 4 A. 48 FMA. Loads A5
173 FMLA v20.4s, v12.4s, v0.s[0]
174 FMLA v22.4s, v12.4s, v1.s[0]
176 FMLA v24.4s, v12.4s, v2.s[0]
177 FMLA v26.4s, v12.4s, v3.s[0]
179 FMLA v28.4s, v12.4s, v4.s[0]
180 FMLA v30.4s, v12.4s, v5.s[0]
[all …]
D5x8-aarch64-neonfma-cortex-a75.S.in73 CMP x0, 4 // if mr < 4
80 // if mr <= 4
87 LD2R {v30.4s, v31.4s}, [x8]
146 LDP q12, q13, [x5], 32 // Fetch 3 B (4th deferred)
157 # First group of 4 A. 40 FMA.
158 FMLA v20.4s, v12.4s, v0.s[0]
160 FMLA v22.4s, v12.4s, v2.s[0]
161 FMLA v24.4s, v12.4s, v4.s[0]
162 FMLA v26.4s, v12.4s, v6.s[0]
165 FMLA v28.4s, v12.4s, v8.s[0]
[all …]
/external/autotest/client/profilers/oprofile/
Doprofile-0.9.4.tar.bz2 ... oprofile-0.9.4/ oprofile-0.9.4/m4/ oprofile-0.9.4/m4
/external/XNNPACK/src/f32-igemm/gen/
D5x8-minmax-aarch64-neonfma-cortex-a57.S77 CMP x0, 4 // if mr < 4
84 // if mr <= 4
91 LD2R {v30.4s, v31.4s}, [x8]
142 LDP q12, q13, [x5], 32 // Fetch 3 B (4th deferred)
153 # First group of 4 A. 40 FMA.
154 FMLA v20.4s, v12.4s, v0.s[0]
156 FMLA v22.4s, v12.4s, v2.s[0]
157 FMLA v24.4s, v12.4s, v4.s[0]
158 FMLA v26.4s, v12.4s, v6.s[0]
159 FMLA v28.4s, v12.4s, v8.s[0]
[all …]
D5x8-minmax-aarch64-neonfma-cortex-a75.S77 CMP x0, 4 // if mr < 4
84 // if mr <= 4
91 LD2R {v30.4s, v31.4s}, [x8]
146 LDP q12, q13, [x5], 32 // Fetch 3 B (4th deferred)
157 # First group of 4 A. 40 FMA.
158 FMLA v20.4s, v12.4s, v0.s[0]
160 FMLA v22.4s, v12.4s, v2.s[0]
161 FMLA v24.4s, v12.4s, v4.s[0]
162 FMLA v26.4s, v12.4s, v6.s[0]
164 FMLA v28.4s, v12.4s, v8.s[0]
[all …]

12345678910>>...864