Home
last modified time | relevance | path

Searched full:copy (Results 1 – 25 of 22144) sorted by relevance

12345678910>>...886

/external/llvm-project/llvm/test/CodeGen/AMDGPU/GlobalISel/
Dinst-select-freeze.mir16 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
17 ; GFX6: $vgpr0 = COPY [[COPY]]
19 ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
20 ; GFX10: $vgpr0 = COPY [[COPY]]
21 %0:vgpr(s32) = COPY $vgpr0
25 $vgpr0 = COPY %3(s32)
39 ; GFX6: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
40 ; GFX6: $agpr0 = COPY [[COPY]]
42 ; GFX10: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
43 ; GFX10: $agpr0 = COPY [[COPY]]
[all …]
Dinst-select-extract-vector-elt.mir17 ; MOVREL: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
18 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
19 ; MOVREL: $m0 = COPY [[COPY1]]
20 …: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
23 ; GPRIDX: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
24 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
25 ; GPRIDX: $m0 = COPY [[COPY1]]
26 …: [[S_MOVRELS_B32_:%[0-9]+]]:sreg_32 = S_MOVRELS_B32 [[COPY]].sub0, implicit $m0, implicit [[COPY]]
28 %0:sgpr(<2 x s32>) = COPY $sgpr0_sgpr1
29 %1:sgpr(s32) = COPY $sgpr2
[all …]
Dinst-select-shuffle-vector.v2s16.mir17 ; GFX9: $vgpr0 = COPY [[DEF]]
18 %0:vgpr(<2 x s16>) = COPY $vgpr0
19 %1:vgpr(<2 x s16>) = COPY $vgpr1
21 $vgpr0 = COPY %2
37 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
38 ; GFX9: $vgpr0 = COPY [[COPY]]
39 %0:vgpr(<2 x s16>) = COPY $vgpr0
40 %1:vgpr(<2 x s16>) = COPY $vgpr1
42 $vgpr0 = COPY %2
58 ; GFX9: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
[all …]
Dinst-select-concat-vectors.mir15 ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
16 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
17 …; GCN: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.…
18 ; GCN: $vgpr0_vgpr1 = COPY [[REG_SEQUENCE]]
19 %0:vgpr(<2 x s16>) = COPY $vgpr0
20 %1:vgpr(<2 x s16>) = COPY $vgpr1
22 $vgpr0_vgpr1 = COPY %2
35 ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
36 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
37 …; GCN: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.…
[all …]
Dinst-select-fcmp.mir14 ; WAVE64: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
15 ; WAVE64: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
16 ; WAVE64: [[FCMP:%[0-9]+]]:vcc(s1) = G_FCMP floatpred(false), [[COPY]](s32), [[COPY1]]
19 ; WAVE32: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
20 ; WAVE32: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
21 ; WAVE32: [[FCMP:%[0-9]+]]:vcc(s1) = G_FCMP floatpred(false), [[COPY]](s32), [[COPY1]]
23 %0:vgpr(s32) = COPY $vgpr0
24 %1:vgpr(s32) = COPY $vgpr1
38 ; WAVE64: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
39 ; WAVE64: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
[all …]
Dregbankselect-freeze.mir14 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
15 ; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY]](s32)
18 ; CHECK: $vgpr0 = COPY [[ANYEXT]](s32)
19 %0:_(s32) = COPY $vgpr0
23 $vgpr0 = COPY %3(s32)
35 ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
36 ; CHECK: [[TRUNC:%[0-9]+]]:vgpr(s1) = G_TRUNC [[COPY]](s32)
39 ; CHECK: $agpr0 = COPY [[ANYEXT]](s32)
40 %0:_(s32) = COPY $vgpr0
44 $agpr0 = COPY %3(s32)
[all …]
Dinst-select-store-flat.mir20 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
21 ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
22 …; GFX7: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (s…
25 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
26 ; GFX8: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
27 …; GFX8: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (s…
30 ; GFX9: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
31 ; GFX9: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
32 …; GFX9: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (s…
35 ; GFX10: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
[all …]
Dinst-select-load-constant.mir21 ; GFX6: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
22 …; GFX6: [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 0, 0, 0 :: (lo…
23 ; GFX6: $sgpr0 = COPY [[S_LOAD_DWORD_IMM]]
26 ; GFX7: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
27 …; GFX7: [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 0, 0, 0 :: (lo…
28 ; GFX7: $sgpr0 = COPY [[S_LOAD_DWORD_IMM]]
31 ; GFX8: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
32 …; GFX8: [[S_LOAD_DWORD_IMM:%[0-9]+]]:sreg_32_xm0_xexec = S_LOAD_DWORD_IMM [[COPY]], 0, 0, 0 :: (lo…
33 ; GFX8: $sgpr0 = COPY [[S_LOAD_DWORD_IMM]]
36 ; GFX10: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
[all …]
Dlegalize-build-vector.mir10 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
11 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
12 ; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32)
14 %0:_(s32) = COPY $vgpr0
15 %1:_(s32) = COPY $vgpr1
25 ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
26 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr1
27 ; CHECK: [[COPY2:%[0-9]+]]:_(s32) = COPY $vgpr2
28 …; CHECK: [[BUILD_VECTOR:%[0-9]+]]:_(<3 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[C…
30 %0:_(s32) = COPY $vgpr0
[all …]
Dinst-select-insert-vector-elt.mir15 ; MOVREL: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
16 ; MOVREL: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
17 ; MOVREL: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr3
18 ; MOVREL: $m0 = COPY [[COPY2]]
19 …E_MOVREL_B32_V2_:%[0-9]+]]:sreg_64 = S_INDIRECT_REG_WRITE_MOVREL_B32_V2 [[COPY]], [[COPY1]], 3, im…
22 ; GPRIDX: [[COPY:%[0-9]+]]:sreg_64 = COPY $sgpr0_sgpr1
23 ; GPRIDX: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr2
24 ; GPRIDX: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr3
25 ; GPRIDX: $m0 = COPY [[COPY2]]
26 …E_MOVREL_B32_V2_:%[0-9]+]]:sreg_64 = S_INDIRECT_REG_WRITE_MOVREL_B32_V2 [[COPY]], [[COPY1]], 3, im…
[all …]
Dinst-select-merge-values.mir16 ; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
17 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
18 …; GCN: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.…
20 %0:vgpr(s32) = COPY $vgpr0
21 %1:vgpr(s32) = COPY $vgpr1
38 ; GCN: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
39 ; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
40 …; GCN: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[COPY1]], %subreg.…
42 %0:sgpr(s32) = COPY $sgpr0
43 %1:vgpr(s32) = COPY $vgpr0
[all …]
Dlegalize-insert.mir11 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
12 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
13 ; CHECK: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY]], [[COPY1]](s32), 0
14 ; CHECK: $vgpr0_vgpr1 = COPY [[INSERT]](s64)
15 %0:_(s64) = COPY $vgpr0_vgpr1
16 %1:_(s32) = COPY $vgpr2
18 $vgpr0_vgpr1 = COPY %2
27 ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $vgpr0_vgpr1
28 ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $vgpr2
29 ; CHECK: [[INSERT:%[0-9]+]]:_(s64) = G_INSERT [[COPY]], [[COPY1]](s32), 32
[all …]
Dinst-select-store-global.mir22 ; GFX6: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
23 ; GFX6: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
29 …; GFX6: BUFFER_STORE_DWORD_ADDR64 [[COPY1]], [[COPY]], [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, 0, 0, imp…
32 ; GFX7: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
33 ; GFX7: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
39 …; GFX7: BUFFER_STORE_DWORD_ADDR64 [[COPY1]], [[COPY]], [[REG_SEQUENCE1]], 0, 0, 0, 0, 0, 0, 0, imp…
42 ; GFX7-FLAT: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
43 ; GFX7-FLAT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr2
44 …; GFX7-FLAT: FLAT_STORE_DWORD [[COPY]], [[COPY1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr …
47 ; GFX8: [[COPY:%[0-9]+]]:vreg_64 = COPY $vgpr0_vgpr1
[all …]
/external/openssh/regress/
Dsftp-perm.sh22 rm -f ${COPY} ${COPY}.1
23 test -d ${COPY}.dd && { rmdir ${COPY}.dd || fatal "rmdir ${COPY}.dd"; }
86 "put $DATA $COPY" \
88 "cmp $DATA $COPY" \
89 "test ! -f $COPY"
93 "chmod 0700 $COPY" \
94 "touch $COPY; chmod 0400 $COPY" \
95 "test -x $COPY" \
96 "test ! -x $COPY"
100 "rm $COPY" \
[all …]
Dsftp-cmds.sh19 QUOTECOPY=${COPY}".\"blah\""
20 QUOTECOPY_ARG=${COPY}'.\"blah\"'
22 SPACECOPY="${COPY} this has spaces.txt"
23 SPACECOPY_ARG="${COPY}\ this\ has\ spaces.txt"
25 GLOBMETACOPY="${COPY} [metachar].txt"
27 rm -rf ${COPY} ${COPY}.1 ${COPY}.2 ${COPY}.dd ${COPY}.dd2
28 mkdir ${COPY}.dd
32 grep copy.dd >/dev/null 2>&1 || fail "lls failed"
36 grep copy.dd >/dev/null 2>&1 || fail "lls w/path failed"
68 rm -f ${COPY}
[all …]
/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/
Dselect-rev.mir25 ; CHECK: %copy:fpr64 = COPY $d0
26 ; CHECK: %rev:fpr64 = REV64v2i32 %copy
27 ; CHECK: $d0 = COPY %rev
29 %copy:fpr(<2 x s32>) = COPY $d0
30 %rev:fpr(<2 x s32>) = G_REV64 %copy
31 $d0 = COPY %rev(<2 x s32>)
46 ; CHECK: %copy:fpr64 = COPY $d0
47 ; CHECK: %rev:fpr64 = REV64v4i16 %copy
48 ; CHECK: $d0 = COPY %rev
50 %copy:fpr(<4 x s16>) = COPY $d0
[all …]
Dselect-dup.mir17 ; CHECK: %copy:gpr32 = COPY $w0
18 ; CHECK: %dup:fpr128 = DUPv4i32gpr %copy
19 ; CHECK: $q0 = COPY %dup
21 %copy:gpr(s32) = COPY $w0
22 %dup:fpr(<4 x s32>) = G_DUP %copy(s32)
23 $q0 = COPY %dup(<4 x s32>)
38 ; CHECK: %copy:gpr64 = COPY $x0
39 ; CHECK: %dup:fpr128 = DUPv2i64gpr %copy
40 ; CHECK: $q0 = COPY %dup
42 %copy:gpr(s64) = COPY $x0
[all …]
Dselect-binop.mir5 # Also check that we constrain the register class of the COPY to GPR32.
20 ; CHECK: [[COPY:%[0-9]+]]:gpr32 = COPY $w0
21 ; CHECK: [[COPY1:%[0-9]+]]:gpr32 = COPY $w1
22 ; CHECK: [[ADDWrr:%[0-9]+]]:gpr32 = ADDWrr [[COPY]], [[COPY1]]
23 ; CHECK: $w0 = COPY [[ADDWrr]]
24 %0(s32) = COPY $w0
25 %1(s32) = COPY $w1
27 $w0 = COPY %2(s32)
46 ; CHECK: [[COPY:%[0-9]+]]:gpr64 = COPY $x0
47 ; CHECK: [[COPY1:%[0-9]+]]:gpr64 = COPY $x1
[all …]
Dselect-fp-casts.mir18 ; CHECK: [[COPY:%[0-9]+]]:fpr32 = COPY $s0
19 ; CHECK: [[FCVTHSr:%[0-9]+]]:fpr16 = FCVTHSr [[COPY]]
20 ; CHECK: $h0 = COPY [[FCVTHSr]]
21 %0(s32) = COPY $s0
23 $h0 = COPY %1(s16)
40 ; CHECK: [[COPY:%[0-9]+]]:fpr64 = COPY $d0
41 ; CHECK: [[FCVTHDr:%[0-9]+]]:fpr16 = FCVTHDr [[COPY]]
42 ; CHECK: $h0 = COPY [[FCVTHDr]]
43 %0(s64) = COPY $d0
45 $h0 = COPY %1(s16)
[all …]
/external/mesa3d/src/mesa/tnl/
Dt_split_copy.c8 * copy of this software and associated documentation files (the "Software"),
10 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
109 * Shallow copy one vertex array to another.
126 check_flush(struct copy_context *copy) in check_flush() argument
128 GLenum mode = copy->dstprim[copy->dstprim_nr].mode; in check_flush()
131 copy->dstelt_nr & 1) { /* see bug9962 */ in check_flush()
135 if (copy->dstbuf_nr + 4 > copy->dstbuf_size) in check_flush()
138 if (copy->dstelt_nr + 4 > copy->dstelt_size) in check_flush()
182 flush(struct copy_context *copy) in flush() argument
184 struct gl_context *ctx = copy->ctx; in flush()
[all …]
/external/protobuf/cmake/
Dextract_includes.bat.in16 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\any.h" include\google\protobuf\any.h
17 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\any.pb.h" include\google\protobuf\any.pb…
18 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\api.pb.h" include\google\protobuf\api.pb…
19 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\arena.h" include\google\protobuf\arena.h
20 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\arena_impl.h" include\google\protobuf\ar…
21 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\arenastring.h" include\google\protobuf\a…
22 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\compiler\code_generator.h" include\googl…
23 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\compiler\command_line_interface.h" inclu…
24 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\compiler\cpp\cpp_generator.h" include\go…
25 copy "${PROTOBUF_SOURCE_WIN32_PATH}\..\src\google\protobuf\compiler\csharp\csharp_generator.h" incl…
[all …]
/external/llvm-project/llvm/test/CodeGen/X86/GlobalISel/
Dselect-memop-scalar.mir115 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
116 ; SSE: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load 1 from %ir.p1)
117 ; SSE: $al = COPY [[MOV8rm]]
120 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
121 ; AVX: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load 1 from %ir.p1)
122 ; AVX: $al = COPY [[MOV8rm]]
125 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
126 … ; AVX512F: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load 1 from %ir.p1)
127 ; AVX512F: $al = COPY [[MOV8rm]]
130 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
[all …]
Dselect-memop-scalar-unordered.mir115 ; SSE: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
116 …; SSE: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered 1 from %i…
117 ; SSE: $al = COPY [[MOV8rm]]
120 ; AVX: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
121 …; AVX: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered 1 from %i…
122 ; AVX: $al = COPY [[MOV8rm]]
125 ; AVX512F: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
126 …; AVX512F: [[MOV8rm:%[0-9]+]]:gr8 = MOV8rm [[COPY]], 1, $noreg, 0, $noreg :: (load unordered 1 fro…
127 ; AVX512F: $al = COPY [[MOV8rm]]
130 ; AVX512VL: [[COPY:%[0-9]+]]:gr64 = COPY $rdi
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/
Dfloat_args.mir28 ; FP32: [[COPY:%[0-9]+]]:fgr32 = COPY $f14
29 ; FP32: $f0 = COPY [[COPY]]
33 ; FP64: [[COPY:%[0-9]+]]:fgr32 = COPY $f14
34 ; FP64: $f0 = COPY [[COPY]]
36 %1:fprb(s32) = COPY $f14
37 $f0 = COPY %1(s32)
53 ; FP32: [[COPY:%[0-9]+]]:afgr64 = COPY $d7
54 ; FP32: $d0 = COPY [[COPY]]
58 ; FP64: [[COPY:%[0-9]+]]:fgr64 = COPY $d7
59 ; FP64: $d0 = COPY [[COPY]]
[all …]
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Dsplitkit-copy-bundle.mir19 ; RA: undef %4.sub0_sub1:sgpr_1024 = COPY %5.sub0_sub1
23 ; RA: undef %6.sub0_sub1:sgpr_1024 = COPY %4.sub0_sub1
24 ; RA: %6.sub2:sgpr_1024 = COPY %6.sub0
25 ; RA: %6.sub3:sgpr_1024 = COPY %6.sub1
26 ; RA: %6.sub4:sgpr_1024 = COPY %6.sub0
27 ; RA: %6.sub5:sgpr_1024 = COPY %6.sub1
28 ; RA: %6.sub6:sgpr_1024 = COPY %6.sub0
29 ; RA: %6.sub7:sgpr_1024 = COPY %6.sub1
30 ; RA: %6.sub8:sgpr_1024 = COPY %6.sub0
31 ; RA: %6.sub9:sgpr_1024 = COPY %6.sub1
[all …]

12345678910>>...886