| /art/runtime/interpreter/ |
| D | interpreter_common.h | 653 int32_t dividend, int32_t divisor) in DoIntDivide() argument
660 if (UNLIKELY(dividend == kMinInt && divisor == -1)) { in DoIntDivide()
663 shadow_frame.SetVReg(result_reg, dividend / divisor); in DoIntDivide()
671 int32_t dividend, int32_t divisor) in DoIntRemainder() argument
678 if (UNLIKELY(dividend == kMinInt && divisor == -1)) { in DoIntRemainder()
681 shadow_frame.SetVReg(result_reg, dividend % divisor); in DoIntRemainder()
690 int64_t dividend, in DoLongDivide() argument
698 if (UNLIKELY(dividend == kMinLong && divisor == -1)) { in DoLongDivide()
701 shadow_frame.SetVRegLong(result_reg, dividend / divisor); in DoLongDivide()
710 int64_t dividend, in DoLongRemainder() argument
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| /art/compiler/optimizing/ |
| D | code_generator_arm64.cc | 3081 Register dividend = InputRegisterAt(instruction, 0); in FOR_EACH_CONDITION_INSTRUCTION() local
3107 final_dividend = dividend; in FOR_EACH_CONDITION_INSTRUCTION()
3111 __ Add(out, dividend, Operand(dividend, LSR, bits - 1)); in FOR_EACH_CONDITION_INSTRUCTION()
3115 __ Add(temp, dividend, abs_imm - 1); in FOR_EACH_CONDITION_INSTRUCTION()
3116 __ Cmp(dividend, 0); in FOR_EACH_CONDITION_INSTRUCTION()
3117 __ Csel(out, temp, dividend, lt); in FOR_EACH_CONDITION_INSTRUCTION()
3160 Register dividend, in GenerateResultRemWithAnyConstant() argument
3166 __ Msub(out, quotient, temp_imm, dividend); in GenerateResultRemWithAnyConstant()
3181 Register dividend = InputRegisterAt(instruction, 0); in GenerateInt64UnsignedDivRemWithAnyPositiveConstant() local
3193 Register dividend, in GenerateInt64UnsignedDivRemWithAnyPositiveConstant()
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| D | code_generator_arm_vixl.cc | 4254 vixl32::Register dividend = InputRegisterAt(instruction, 0); in DivRemOneOrMinusOne() local
4262 __ Mov(out, dividend); in DivRemOneOrMinusOne()
4264 __ Rsb(out, dividend, 0); in DivRemOneOrMinusOne()
4278 vixl32::Register dividend = InputRegisterAt(instruction, 0); in DivRemByPowerOfTwo() local
4323 generate_div_code(out, dividend); in DivRemByPowerOfTwo()
4326 __ And(out, dividend, abs_imm - 1); in DivRemByPowerOfTwo()
4328 __ Ubfx(out, dividend, 0, ctz_imm); in DivRemByPowerOfTwo()
4333 vixl32::Register add_right_input = dividend; in DivRemByPowerOfTwo()
4335 __ Asr(out, dividend, 31); in DivRemByPowerOfTwo()
4338 __ Add(out, dividend, Operand(add_right_input, vixl32::LSR, 32 - ctz_imm)); in DivRemByPowerOfTwo()
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| D | instruction_simplifier.cc | 1802 static HInstruction* FindDivWithInputsInBasicBlock(HInstruction* dividend, in FindDivWithInputsInBasicBlock() argument
1805 for (const HUseListNode<HInstruction*>& use : dividend->GetUses()) { in FindDivWithInputsInBasicBlock()
1829 HInstruction* dividend = rem->GetLeft(); in TryToReuseDiv() local
1842 HInstruction* quotient = FindDivWithInputsInBasicBlock(dividend, divisor, basic_block); in TryToReuseDiv()
1853 HInstruction* sub = new (allocator) HSub(type, dividend, mul); in TryToReuseDiv()
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| D | code_generator_arm64.h | 375 vixl::aarch64::Register dividend,
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| D | intrinsics_arm64.cc | 3828 Register dividend = RegisterFrom(locations->InAt(0), type); in GenerateDivideUnsigned() local
3838 __ Udiv(out, dividend, divisor); in GenerateDivideUnsigned()
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| D | intrinsics_arm_vixl.cc | 2665 vixl32::Register dividend = RegisterFrom(locations->InAt(0)); in VisitIntegerDivideUnsigned() local
2675 __ Udiv(out, dividend, divisor); in VisitIntegerDivideUnsigned()
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