/art/runtime/interpreter/mterp/arm64/ |
D | other.S | 8 FETCH w0, 1 // w0<- BBBB 14 cbnz w0, MterpPossibleException // let reference interpreter deal with it. 28 FETCH w0, 1 // w0<- bbbb (low 31 orr w0, w0, w1, lsl #16 // w0<- BBBBbbbb 33 SET_VREG w0, w3 // vAA<- w0 38 FETCH_S w0, 1 // w0<- ssssBBBB (sign-extended) 41 SET_VREG w0, w3 // vAA<- w0 48 ubfx w0, wINST, #8, #4 // w0<- A 51 SET_VREG w1, w0 // fp[A]<- w1 59 FETCH w0, 1 // r0<- 0000BBBB (zero-extended) [all …]
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D | array.S | 17 GET_VREG w0, w2 // w0<- vBB (array object) 49 GET_VREG w0, w2 // w0<- vBB (array object) 56 SET_VREG_OBJECT w0, w2 70 FETCH w0, 1 // w0<- CCBB 72 and w2, w0, #255 // w2<- BB 73 lsr w3, w0, #8 // w3<- CC 74 GET_VREG w0, w2 // w0<- vBB (array object) 76 cbz w0, common_errNullObject // yes, bail 103 GET_VREG w0, w2 // w0<- vBB (array object) 105 cbz w0, common_errNullObject // bail if null [all …]
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D | floating_point.S | 9 FETCH w0, 1 // r0<- CCBB 10 lsr w1, w0, #8 // r2<- CC 11 and w0, w0, #255 // r1<- BB 13 GET_VREG s0, w0 26 FETCH w0, 1 // w0<- CCBB 28 lsr w2, w0, #8 // w2<- CC 29 and w1, w0, #255 // w1<- BB 78 FETCH w0, 1 // w0<- CCBB 80 and w2, w0, #255 // w2<- BB 81 lsr w3, w0, #8 // w3<- CC [all …]
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D | arithmetic.S | 18 FETCH w0, 1 // w0<- CCBB 20 lsr w3, w0, #8 // w3<- CC 21 and w2, w0, #255 // w2<- BB 23 GET_VREG w0, w2 // w0<- vBB 54 GET_VREG w0, w9 // w0<- vA 83 GET_VREG w0, w2 // w0<- vB 117 GET_VREG w0, w2 // w0<- vBB 144 FETCH w0, 1 // w0<- CCBB 146 lsr w2, w0, #8 // w2<- CC 147 and w1, w0, #255 // w1<- BB [all …]
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D | invoke.S | 14 cbz w0, MterpException 16 ldr w0, [xSELF, #THREAD_USE_MTERP_OFFSET] 17 cbz w0, MterpFallback 35 cbz w0, MterpException 37 ldr w0, [xSELF, #THREAD_USE_MTERP_OFFSET] 38 cbz w0, MterpFallback
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D | control_flow.S | 10 ubfx w0, wINST, #8, #4 // w0<- A 12 GET_VREG w2, w0 // w2<- vA 30 lsr w0, wINST, #8 // w0<- AA 31 GET_VREG w2, w0 // w2<- vAA 78 FETCH w0, 1 // w0<- aaaa (lo) 80 orr wINST, w0, w1, lsl #16 // wINST<- AAAAaaaa 130 FETCH w0, 1 // x0<- 000000000000bbbb (lo) 137 sxtw xINST, w0 155 GET_VREG w0, w2 // r0<- vAA
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D | object.S | 23 FETCH w0, 1 // w0<- BBBB 30 cbnz w0, MterpPossibleException 50 ${load} w0, [x2, x1] // w0<- obj.field 53 UNPOISON_HEAP_REF w0 67 SET_VREG_OBJECT w0, w2 // fp[A]<- w0 71 SET_VREG w0, w2 // fp[A]<- w0 110 FETCH w0, 1 // w0<- CCCC 121 SET_VREG w0, w2 // vA<- w0 156 cbz w0, MterpPossibleException
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D | main.S | 419 ldr w0, [x2, #SHADOWFRAME_NUMBER_OF_VREGS_OFFSET] 421 add xREFS, xFP, w0, uxtw #2 // point to reference array in shadow frame 422 ldr w0, [x2, #SHADOWFRAME_DEX_PC_OFFSET] // Get starting dex_pc. 423 add xPC, x1, w0, uxtw #1 // Create direct pointer to 1st dex opcode 435 mov wPROFILE, w0 // Starting hotness countdown to xPROFILE 562 cbz w0, MterpExceptionReturn // no local catch, back to caller. 568 ldr w0, [xSELF, #THREAD_USE_MTERP_OFFSET] 569 cbz w0, MterpFallback 659 mov wPROFILE, w0 // restore new hotness countdown to wPROFILE
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/art/runtime/interpreter/mterp/arm64ng/ |
D | other.S | 7 FETCH w0, 1 // w0<- bbbb (low) 10 orr w0, w0, w1, lsl #16 // w0<- BBBBbbbb 12 SET_VREG w0, w3 // vAA<- w0 17 FETCH_S w0, 1 // w0<- ssssBBBB (sign-extended) 20 SET_VREG w0, w3 // vAA<- w0 27 ubfx w0, wINST, #8, #4 // w0<- A 30 SET_VREG w1, w0 // fp[A]<- w1 35 FETCH w0, 1 // r0<- 0000BBBB (zero-extended) 37 lsl w0, w0, #16 // r0<- BBBB0000 39 SET_VREG w0, w3 // vAA<- r0 [all …]
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D | control_flow.S | 10 ubfx w0, wINST, #8, #4 // w0<- A 12 GET_VREG w2, w0 // w2<- vA 30 lsr w0, wINST, #8 // w0<- AA 31 GET_VREG w2, w0 // w2<- vAA 76 FETCH w0, 1 // w0<- aaaa (lo) 78 orr wINST, w0, w1, lsl #16 // wINST<- AAAAaaaa 128 FETCH w0, 1 // x0<- 000000000000bbbb (lo) 135 sxtw xINST, w0 156 GET_VREG w0, w2 // r0<- vAA 160 fmov s0, w0 [all …]
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D | object.S | 8 GET_VREG w0, w2 // w0<- vA (object) 9 cbz w0, 2f 34 GET_VREG w0, w2 // w0<- vB (object) 35 cbz w0, 2f 39 SET_VREG w0, w1 79 $load w0, [x3, x0] 82 SET_VREG_OBJECT w0, w2 // fp[A] <- value 84 $load w0, [x3, x0] 85 SET_VREG w0, w2 // fp[A] <- value 103 tbz w0, #31, .L${opcode}_resume [all …]
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D | array.S | 11 GET_VREG w0, w2 // w0<- vBB (array object) 67 GET_VREG w0, w2 // w0<- vBB (array object) 69 cbz w0, common_errNullObject // bail if null 119 GET_VREG w0, w1 // w0<- vB (object ref) 120 cbz w0, common_errNullObject // bail if null 130 FETCH w0, 1 // x0<- 000000000000bbbb (lo)
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D | invoke.S | 3 FETCH w0, 1 // call_site index, first argument of runtime call. 8 FETCH w0, 1 // call_site index, first argument of runtime call. 157 ldr w0, [x1, #MIRROR_OBJECT_CLASS_OFFSET] 158 add w0, w0, #MIRROR_CLASS_VTABLE_OFFSET_64
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D | main.S | 846 fmov w0, s0 1037 UPDATE_REGISTERS_FOR_STRING_INIT w1, w0 1391 UPDATE_REGISTERS_FOR_STRING_INIT w1, w0 1761 SET_VREG_OBJECT w0, w1
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/art/test/476-checker-ctor-fence-redun-elim/src/ |
D | Main.java | 30 int w0; field in Base 41 return String.format("w0: %d, w1: %d, w2: %d, w3: %d", w0, w1, w2, w3); in baseString() 102 b.w0 = 1; in exercise() 176 b.w0 = 3; in exercise() 262 b.w0 = 3; in exercise() 268 b2.w0 = 7; in exercise() 354 array[0] = b.w0; // aput in exercise() 356 base.w0 = b.w0; // iput in exercise()
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/art/runtime/arch/arm64/ |
D | quick_entrypoints_arm64.S | 215 cbnz w0, 1f // result non-zero branch over 893 cbz w0, art_quick_lock_object_no_inline 1083 .ifnc \wDest, w0 1084 mov \wDest, w0 // save return value in wDest 1267 cbz w0, 1f // If result is null, deliver the OOME. 1284 cbz w0, 1f // result zero branch over 1415 POISON_HEAP_REF w0 1416 str w0, [x3, #MIRROR_OBJECT_CLASS_OFFSET] 1492 POISON_HEAP_REF w0 1493 str w0, [x4, #MIRROR_OBJECT_CLASS_OFFSET] // Store the class pointer. [all …]
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/art/compiler/optimizing/ |
D | code_generator_arm64.cc | 150 return LocationFrom(w0); in ARM64ReturnLocation() 4664 __ Ubfx(w0, w0, 0, 8); in GenerateStaticOrDirectCall() 4667 __ Sbfx(w0, w0, 0, 8); in GenerateStaticOrDirectCall() 4670 __ Ubfx(w0, w0, 0, 16); in GenerateStaticOrDirectCall() 4673 __ Sbfx(w0, w0, 0, 16); in GenerateStaticOrDirectCall() 6027 __ Fmov(w0, s0); in VisitReturn() 6100 __ Mov(w0, instruction->GetFormat()->GetValue()); in VisitStringBuilderAppend()
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/art/compiler/utils/arm64/ |
D | managed_register_arm64_test.cc | 636 EXPECT_TRUE(vixl::aarch64::w0.Is(Arm64Assembler::reg_w(W0))); in TEST()
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