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/external/llvm-project/llvm/test/MC/ARM/
Dnegative-immediates.s2 … armv7 %s -show-encoding -mattr=+no-neg-immediates 2>&1 | FileCheck %s -check-prefix=CHECK-DISABLED
8 # CHECK-DISABLED: note: instruction requires: NegativeImmediates
9 # CHECK-DISABLED: ADC
12 # CHECK-DISABLED: note: instruction requires: NegativeImmediates
13 # CHECK-DISABLED: ADC
16 # CHECK-DISABLED: note: instruction requires: NegativeImmediates
17 # CHECK-DISABLED: ADD
20 # CHECK-DISABLED: note: instruction requires: NegativeImmediates
21 # CHECK-DISABLED: AND
24 # CHECK-DISABLED: note: instruction requires: NegativeImmediates
[all …]
Dnegative-immediates-thumb1.s2 …tex-m0 %s -show-encoding -mattr=+no-neg-immediates 2>&1 | FileCheck %s -check-prefix=CHECK-DISABLED
8 # CHECK-DISABLED: note: instruction requires: NegativeImmediates
11 # CHECK-DISABLED: note: instruction requires: NegativeImmediates
15 # CHECK-DISABLED: note: instruction requires: NegativeImmediates
19 # CHECK-DISABLED: note: instruction requires: NegativeImmediates
/external/llvm-project/llvm/test/CodeGen/X86/
Dlea-opt.ll3 …le-x86-lea-opt < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK -check-prefix=DISABLED
34 ; DISABLED-LABEL: test1:
35 ; DISABLED: # %bb.0: # %entry
36 ; DISABLED-NEXT: shlq $2, %rdi
37 ; DISABLED-NEXT: movl arr1(%rdi,%rdi,2), %edx
38 ; DISABLED-NEXT: leaq arr1+4(%rdi,%rdi,2), %rax
39 ; DISABLED-NEXT: subl arr1+4(%rdi,%rdi,2), %edx
40 ; DISABLED-NEXT: leaq arr1+8(%rdi,%rdi,2), %rcx
41 ; DISABLED-NEXT: addl arr1+8(%rdi,%rdi,2), %edx
42 ; DISABLED-NEXT: cmpl $2, %edx
[all …]
Davoid-sfb.ll3 …x -mcpu=x86-64 --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED
31 ; DISABLED-LABEL: test_conditional_block:
32 ; DISABLED: # %bb.0: # %entry
33 ; DISABLED-NEXT: cmpl $18, %edx
34 ; DISABLED-NEXT: jl .LBB0_2
35 ; DISABLED-NEXT: # %bb.1: # %if.then
36 ; DISABLED-NEXT: movl %edx, 4(%rdi)
37 ; DISABLED-NEXT: .LBB0_2: # %if.end
38 ; DISABLED-NEXT: movups (%r8), %xmm0
39 ; DISABLED-NEXT: movups %xmm0, (%rcx)
[all …]
Davoid-sfb-overlaps.ll3 …x -mcpu=x86-64 --x86-disable-avoid-SFB -verify-machineinstrs | FileCheck %s --check-prefix=DISABLED
39 ; DISABLED-LABEL: test_overlap_1:
40 ; DISABLED: # %bb.0: # %entry
41 ; DISABLED-NEXT: movl $7, -8(%rdi)
42 ; DISABLED-NEXT: movups -16(%rdi), %xmm0
43 ; DISABLED-NEXT: movups %xmm0, (%rdi)
44 ; DISABLED-NEXT: movslq %esi, %rax
45 ; DISABLED-NEXT: movq %rax, -9(%rdi)
46 ; DISABLED-NEXT: movq %rax, -16(%rdi)
47 ; DISABLED-NEXT: movb $0, -1(%rdi)
[all …]
/external/llvm-project/llvm/test/CodeGen/Thumb2/LowOverheadLoops/
Dtail-pred-disabled-in-loloops.ll8 ; RUN: FileCheck %s --check-prefix=DISABLED
37 ; DISABLED-LABEL: check_option:
38 ; DISABLED: @ %bb.0: @ %entry
39 ; DISABLED-NEXT: push.w {r4, r5, r6, r7, r8, lr}
40 ; DISABLED-NEXT: cmp r3, #1
41 ; DISABLED-NEXT: blt .LBB0_4
42 ; DISABLED-NEXT: @ %bb.1: @ %vector.ph.preheader
43 ; DISABLED-NEXT: adds r7, r3, #3
44 ; DISABLED-NEXT: movs r6, #1
45 ; DISABLED-NEXT: bic r7, r7, #3
[all …]
/external/llvm/test/CodeGen/Mips/
D2008-07-15-SmallSection.ll1 ; DISABLED: llc < %s -mips-ssection-threshold=8 -march=mips -o %t0
2 ; DISABLED: llc < %s -mips-ssection-threshold=0 -march=mips -o %t1
3 ; DISABLED: grep {sdata} %t0 | count 1
4 ; DISABLED: grep {sbss} %t0 | count 1
5 ; DISABLED: grep {gp_rel} %t0 | count 2
6 ; DISABLED: not grep {sdata} %t1
7 ; DISABLED: not grep {sbss} %t1
8 ; DISABLED: not grep {gp_rel} %t1
9 ; DISABLED: grep {\%hi} %t1 | count 2
10 ; DISABLED: grep {\%lo} %t1 | count 3
/external/llvm-project/llvm/test/CodeGen/AMDGPU/
Damdgpu-codegenprepare-mul24.ll4 …fiji -amdgpu-codegenprepare-mul24=0 -amdgpu-codegenprepare %s | FileCheck -check-prefix=DISABLED %s
18 ; DISABLED-LABEL: @mul_i16(
19 ; DISABLED-NEXT: [[MUL:%.*]] = mul i16 [[LHS:%.*]], [[RHS:%.*]]
20 ; DISABLED-NEXT: ret i16 [[MUL]]
43 ; DISABLED-LABEL: @smul24_i32(
44 ; DISABLED-NEXT: [[SHL_LHS:%.*]] = shl i32 [[LHS:%.*]], 8
45 ; DISABLED-NEXT: [[LHS24:%.*]] = ashr i32 [[SHL_LHS]], 8
46 ; DISABLED-NEXT: [[LSHR_RHS:%.*]] = shl i32 [[RHS:%.*]], 8
47 ; DISABLED-NEXT: [[RHS24:%.*]] = ashr i32 [[LHS]], 8
48 ; DISABLED-NEXT: [[MUL:%.*]] = mul i32 [[LHS24]], [[RHS24]]
[all …]
/external/llvm/test/CodeGen/ARM/
Da15-SD-dep.ll1 …disable-a15-sd-optimization -verify-machineinstrs < %s | FileCheck -check-prefix=CHECK-DISABLED %s
5 ; CHECK-DISABLED-LABEL: t1:
8 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
15 ; CHECK-DISABLED-LABEL: t2:
18 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
25 ; CHECK-DISABLED-LABEL: t3:
28 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
35 ; CHECK-DISABLED-LABEL: t4:
38 ; CHECK-DISABLED-NOT: vdup
49 ; CHECK-DISABLED-LABEL: t5:
[all …]
/external/crosvm/
Drun_tests23 "cros_async": [Requirements.DISABLED],
35 "fuzz": [Requirements.DISABLED],
82 "video-decoder": [Requirements.DISABLED],
83 "video-encoder": [Requirements.DISABLED],
84 "wl-dmabuf": [Requirements.DISABLED],
89 "gfxstream": [Requirements.DISABLED],
/external/llvm-project/llvm/test/CodeGen/AArch64/GlobalISel/
Dgisel-commandline-option-fastisel.ll5 ; RUN: | FileCheck %s --check-prefixes=DISABLED,FASTISEL
9 ; RUN: | FileCheck %s --check-prefixes=DISABLED,NOFASTISEL
14 ; RUN: | FileCheck %s --check-prefixes=DISABLED,NOFASTISEL
19 ; RUN: | FileCheck %s --check-prefixes=DISABLED,NOFASTISEL
25 ; DISABLED-NOT: IRTranslator
27 ; DISABLED: AArch64 Instruction Selection
28 ; DISABLED: Finalize ISel and expand pseudo-instructions
Dprelegalizercombiner-copy-prop-disabled.mir5 … --aarch64prelegalizercombinerhelper-disable-rule=copy_prop | FileCheck --check-prefix=DISABLED %s
7 # RUN: --aarch64prelegalizercombinerhelper-disable-rule="*" | FileCheck --check-prefix=DISABLED…
34 ; DISABLED-LABEL: name: test_copy
35 ; DISABLED: [[COPY:%[0-9]+]]:_(p0) = COPY $x0
36 ; DISABLED: [[COPY1:%[0-9]+]]:_(p0) = COPY [[COPY]](p0)
37 ; DISABLED: [[COPY2:%[0-9]+]]:_(p0) = COPY [[COPY1]](p0)
38 ; DISABLED: $x0 = COPY [[COPY2]](p0)
/external/opencensus-java/impl_core/src/test/java/io/opencensus/implcore/tags/
DTagsComponentImplBaseTest.java45 tagsComponent.setState(TaggingState.DISABLED); in setState_Disabled()
46 assertThat(tagsComponent.getState()).isEqualTo(TaggingState.DISABLED); in setState_Disabled()
52 tagsComponent.setState(TaggingState.DISABLED); in setState_Enabled()
68 tagsComponent.setState(TaggingState.DISABLED); in preventSettingStateAfterGettingState_DifferentState()
78 tagsComponent.setState(TaggingState.DISABLED); in preventSettingStateAfterGettingState_SameState()
82 tagsComponent.setState(TaggingState.DISABLED); in preventSettingStateAfterGettingState_SameState()
DTaggerImplTest.java68 tagsComponent.setState(TaggingState.DISABLED); in empty_TaggingDisabled()
82 tagsComponent.setState(TaggingState.DISABLED); in emptyBuilder_TaggingDisabled()
88 tagsComponent.setState(TaggingState.DISABLED); in emptyBuilder_TaggingReenabled()
129 tagsComponent.setState(TaggingState.DISABLED); in currentBuilder_TaggingDisabled()
137 tagsComponent.setState(TaggingState.DISABLED); in currentBuilder_TaggingReenabled()
180 tagsComponent.setState(TaggingState.DISABLED); in toBuilder_TaggingDisabled()
188 tagsComponent.setState(TaggingState.DISABLED); in toBuilder_TaggingReenabled()
229 tagsComponent.setState(TaggingState.DISABLED); in getCurrentTagContext_TaggingDisabled()
237 tagsComponent.setState(TaggingState.DISABLED); in getCurrentTagContext_TaggingReenabled()
278 tagsComponent.setState(TaggingState.DISABLED); in withTagContext_ReturnsNoopScopeWhenTaggingIsDisabled()
[all …]
/external/python/cpython2/Demo/turtle/
DturtleDemo.py99 self.configGUI(NORMAL, DISABLED, DISABLED, DISABLED,
213 self.configGUI(NORMAL, NORMAL, DISABLED, DISABLED,
221 self.configGUI(DISABLED, DISABLED, NORMAL, DISABLED,
239 self.configGUI(NORMAL, NORMAL, DISABLED, NORMAL,
243 self.configGUI(DISABLED, DISABLED, NORMAL, DISABLED,
249 self.configGUI(NORMAL, NORMAL, DISABLED, DISABLED)
255 self.configGUI(NORMAL, NORMAL, DISABLED, DISABLED,
/external/llvm/test/CodeGen/X86/
Dlea-opt.ll2 …le-x86-lea-opt < %s -mtriple=x86_64-linux | FileCheck %s -check-prefix=CHECK -check-prefix=DISABLED
42 ; DISABLED: leaq arr1+8([[REG1]],[[REG1]],2), [[REG3:%[a-z]+]]
46 ; DISABLED: movl ${{[1-4]+}}, ([[REG3]])
49 ; DISABLED: movl ${{[1-4]+}}, ([[REG3]])
81 ; DISABLED: movl arr1([[REG1]],[[REG1]],2), {{.*}}
86 ; DISABLED: subl arr1+4([[REG1]],[[REG1]],2), {{.*}}
87 ; DISABLED: leaq arr1+8([[REG1]],[[REG1]],2), [[REG3:%[a-z]+]]
88 ; DISABLED: addl arr1+8([[REG1]],[[REG1]],2), {{.*}}
91 ; DISABLED: movl ${{[1-4]+}}, ([[REG3]])
94 ; DISABLED: movl ${{[1-4]+}}, ([[REG3]])
[all …]
/external/harfbuzz_ng/test/shaping/data/text-rendering-tests/
Dupdate.sh26 DISABLED="DISBALED_TESTS = \\"
31 if grep -q "^$out$" DISABLED; then
32 DISABLED="$DISABLED
42 echo "$DISABLED" >> Makefile.sources
/external/python/cpython3/Lib/turtledemo/
D__main__.py193 self.configGUI(DISABLED, DISABLED, DISABLED,
328 self.configGUI(NORMAL, DISABLED, DISABLED,
336 self.configGUI(DISABLED, NORMAL, DISABLED,
354 self.configGUI(NORMAL, DISABLED, NORMAL,
358 self.configGUI(DISABLED, NORMAL, DISABLED,
365 self.configGUI(NORMAL, DISABLED, DISABLED)
371 self.configGUI(NORMAL, DISABLED, DISABLED,
/external/llvm-project/llvm/test/CodeGen/ARM/
Dsmul.ll1 ; RUN: llc -mtriple=arm-eabi -mcpu=generic %s -o - | FileCheck %s --check-prefix=DISABLED
5 ; RUN: llc -mtriple=thumbv6-none-eabi %s -o - | FileCheck %s -check-prefix=DISABLED
11 ; DISABLED-NOT: {{smulbt|smultb}}
21 ; DISABLED-NOT: smultt
32 ; DISABLED-NOT: {{smlabt|smlatb}}
43 ; DISABLED-NOT: smlatt
55 ; DISABLED-NOT: smlabb
67 ; DISABLED-NOT: {{smlatb|smlabt}}
78 ; DISABLED-NOT: smlawb
94 ; DISABLED-NOT: smlawb
[all …]
Da15-SD-dep.ll1 …machineinstrs -disable-a15-sd-optimization < %s | FileCheck -check-prefixes=CHECK,CHECK-DISABLED %s
2 …machineinstrs < %s | FileCheck -check-prefixes=CHECK,CHECK-DISABLED %s
8 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
17 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
26 ; CHECK-DISABLED-NOT: vdup.32 d{{[0-9]*}}, d0[0]
35 ; CHECK-DISABLED-NOT: vdup
50 ; CHECK-DISABLED-NOT: vdup
66 ; CHECK-DISABLED-NOT: vdup
92 ; CHECK-DISABLED-NOT: vdup
/external/llvm-project/llvm/test/DebugInfo/X86/
Dno_debug_ranges.ll1 …inux-gnu < %s -o - -dwarf-version=2 -no-dwarf-ranges-section | FileCheck %s --check-prefix=DISABLED
4 ; DISABLED-NOT: {{DW_AT_ranges|.debug_ranges}}
5 ; DISABLED: .section .debug_info
6 ; DISABLED-NOT: {{DW_AT_ranges|.section}}
7 ; DISABLED: .quad .Lfunc_begin0 # DW_AT_low_pc
8 ; DISABLED-NEXT: .quad .Lfunc_end1 # DW_AT_high_pc
9 ; DISABLED-NOT: {{DW_AT_ranges|.debug_ranges}}
/external/opencensus-java/impl_core/src/main/java/io/opencensus/implcore/tags/
DTaggerImpl.java49 return state.getInternal() == State.DISABLED in getCurrentTagContext()
56 return state.getInternal() == State.DISABLED in emptyBuilder()
63 return state.getInternal() == State.DISABLED in currentBuilder()
70 return state.getInternal() == State.DISABLED in toBuilder()
77 return state.getInternal() == State.DISABLED in withTagContext()
/external/opencensus-java/impl_core/src/test/java/io/opencensus/implcore/stats/
DStatsComponentImplBaseTest.java48 statsComponent.setState(StatsCollectionState.DISABLED); in setState_Disabled()
49 assertThat(statsComponent.getState()).isEqualTo(StatsCollectionState.DISABLED); in setState_Disabled()
55 statsComponent.setState(StatsCollectionState.DISABLED); in setState_Enabled()
71 statsComponent.setState(StatsCollectionState.DISABLED); in preventSettingStateAfterGettingState()
/external/llvm-project/lld/test/COFF/
Dlto-new-pass-manager.ll9 …nager -opt:ltodebugpassmanager -opt:noltonewpassmanager 2>&1 | FileCheck %s --check-prefix=DISABLED
10 …ger -opt:ltodebugpassmanager -opt:noltodebugpassmanager 2>&1 | FileCheck %s --check-prefix=DISABLED
11 ; DISABLED-NOT: Starting llvm::Module pass manager run.
12 ; DISABLED-NOT: Finished llvm::Module pass manager run.
/external/llvm-project/llvm/test/DebugInfo/Generic/
Dextended-loc-directive.ll2 …se=0 -O0 -dwarf-extended-loc=Disable < %s | FileCheck %s --check-prefix DISABLED --check-prefix CH…
18 ; DISABLED: .loc 1 3 3{{$}}
21 ; DISABLED: .loc 1 3 9{{$}}
26 ; DISABLED: .loc 1 4 3{{$}}
29 ; DISABLED: .loc 1 4 9{{$}}
34 ; DISABLED: .loc 1 5 1{{$}}

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