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Searched refs:ADDri (Results 1 – 25 of 87) sorted by relevance

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/external/llvm/test/CodeGen/MIR/ARM/
Dimm-peephole-arm.mir4 # CHECK: [[SUM1TMP:%.*]] = ADDri [[IN]], 133
5 # CHECK: [[SUM1:%.*]] = ADDri killed [[SUM1TMP]], 25600
13 # CHECK: [[SUM4TMP:%.*]] = ADDri killed [[IN]], 133
14 # CHECK: [[SUM4:%.*]] = ADDri killed [[SUM4TMP]], 25600
Dcfi-same-value.mir77 %sp = ADDri killed %sp, 40, 14, _, _
/external/llvm-project/llvm/test/CodeGen/ARM/
Dimm-peephole-arm.mir4 # CHECK: [[SUM1TMP:%.*]]:rgpr = ADDri [[IN]], 133
5 # CHECK: [[SUM1:%.*]]:rgpr = ADDri killed [[SUM1TMP]], 25600
13 # CHECK: [[SUM4TMP:%.*]]:rgpr = ADDri killed [[IN]], 133
14 # CHECK: [[SUM4:%.*]]:rgpr = ADDri killed [[SUM4TMP]], 25600
Dno-register-coalescing-in-returnsTwice.mir10 # CHECK: %[[R1:[0-9]+]]:gpr = ADDri %stack.0.P0, 0, 14
13 # CHECK: %[[R2:[0-9]+]]:gpr = nuw ADDri %[[R1]], 8, 14
97 %1:gpr = ADDri %stack.0.P0, 0, 14, $noreg, $noreg
98 %2:gpr = ADDri %1, 40, 14, $noreg, $noreg
100 %3:gpr = ADDri %1, 24, 14, $noreg, $noreg
102 %4:gpr = nuw ADDri %1, 8, 14, $noreg, $noreg
107 %6:gpr = ADDri %stack.1.jb1, 0, 14, $noreg, $noreg
139 %28:gpr = ADDri %stack.1.jb1, 0, 14, $noreg, $noreg
149 %11:gpr = ADDri killed %1, 52, 14, $noreg, $noreg
156 %14:gpr = ADDri %stack.1.jb1, 0, 14, $noreg, $noreg
[all …]
Dcrash-O0.ll17 ; This function uses the scavenger for an ADDri instruction.
Dmachine-outliner-thunk.ll24 ; ARM-NEXT: renamable $r0 = ADDri killed renamable $r0, 8, 14 /* CC::al */, $noreg, $noreg
66 ; ARM-NEXT: renamable $r0 = ADDri killed renamable $r0, 88, 14 /* CC::al */, $noreg, $noreg
Dfp16-litpool2-arm.mir105 $sp = ADDri $sp, 4, 14, $noreg, $noreg
/external/llvm-project/llvm/lib/Target/Sparc/
DSparcFrameLowering.cpp45 unsigned ADDri) const { in emitSPAdjustment()
52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6) in emitSPAdjustment()
120 SAVEri = SP::ADDri; in emitPrologue()
184 BuildMI(MBB, MBBI, dl, TII.get(SP::ADDri), regUnbiased) in emitPrologue()
197 BuildMI(MBB, MBBI, dl, TII.get(SP::ADDri), SP::O6) in emitPrologue()
213 emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri); in eliminateCallFramePseudoInstr()
239 emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri); in emitEpilogue()
DSparcFrameLowering.h62 int NumBytes, unsigned ADDrr, unsigned ADDri) const;
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/
DSparcFrameLowering.cpp45 unsigned ADDri) const { in emitSPAdjustment()
52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6) in emitSPAdjustment()
120 SAVEri = SP::ADDri; in emitPrologue()
186 BuildMI(MBB, MBBI, dl, TII.get(SP::ADDri), regUnbiased) in emitPrologue()
198 BuildMI(MBB, MBBI, dl, TII.get(SP::ADDri), SP::O6) in emitPrologue()
214 emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri); in eliminateCallFramePseudoInstr()
240 emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri); in emitEpilogue()
DSparcFrameLowering.h61 int NumBytes, unsigned ADDrr, unsigned ADDri) const;
/external/llvm/lib/Target/Sparc/
DSparcFrameLowering.cpp45 unsigned ADDri) const { in emitSPAdjustment()
52 BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6) in emitSPAdjustment()
119 SAVEri = SP::ADDri; in emitPrologue()
196 emitSPAdjustment(MF, MBB, I, Size, SP::ADDrr, SP::ADDri); in eliminateCallFramePseudoInstr()
222 emitSPAdjustment(MF, MBB, MBBI, NumBytes, SP::ADDrr, SP::ADDri); in emitEpilogue()
DSparcFrameLowering.h62 int NumBytes, unsigned ADDrr, unsigned ADDri) const;
/external/llvm-project/llvm/test/DebugInfo/MIR/ARM/
Ddbgcall-site-interpretation.mir140 $r11 = frame-setup ADDri $sp, 8, 14, $noreg, $noreg
147 renamable $r0 = nsw ADDri killed $r0, 2, 14, $noreg, $noreg, debug-location !22
150 renamable $r2 = ADDri $sp, 4, 14, $noreg, $noreg
157 renamable $r1 = nsw ADDri killed renamable $r4, 8, 14, $noreg, $noreg, debug-location !22
Ddbgcallsite-noreg-is-imm-check.mir68 $r11 = frame-setup ADDri $sp, 8, 14, $noreg, $noreg
/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
DREADME.txt35 %reg1037 = ADDri %reg1039, 1
43 Note ADDri is not a two-address instruction. However, its result %reg1037 is an
45 PHI node. We should treat it as a two-address code and make sure the ADDri is
/external/llvm/lib/CodeGen/
DREADME.txt35 %reg1037 = ADDri %reg1039, 1
43 Note ADDri is not a two-address instruction. However, its result %reg1037 is an
45 PHI node. We should treat it as a two-address code and make sure the ADDri is
/external/llvm-project/llvm/lib/CodeGen/
DREADME.txt35 %reg1037 = ADDri %reg1039, 1
43 Note ADDri is not a two-address instruction. However, its result %reg1037 is an
45 PHI node. We should treat it as a two-address code and make sure the ADDri is
/external/llvm/test/CodeGen/ARM/
Dcrash-O0.ll17 ; This function uses the scavenger for an ADDri instruction.
/external/llvm-project/llvm/test/CodeGen/MIR/ARM/
Dcfi-same-value.mir77 $sp = ADDri killed $sp, 40, 14, _, _
/external/llvm/lib/Target/ARM/
DARMMCInstLower.cpp123 case ARM::ADDri: in LowerARMMachineInstrToMCInst()
/external/llvm-project/llvm/test/CodeGen/ARM/GlobalISel/
Darm-instruction-select.mir590 ; CHECK: [[ADDri:%[0-9]+]]:gpr = ADDri [[COPY]], 255, 14 /* CC::al */, $noreg, $noreg
591 ; CHECK: $r0 = COPY [[ADDri]]
937 ; CHECK: [[ADDri:%[0-9]+]]:gpr = ADDri %fixed-stack.0, 0, 14 /* CC::al */, $noreg, $noreg
938 ; CHECK: [[LDRi12_:%[0-9]+]]:gpr = LDRi12 [[ADDri]], 0, 14 /* CC::al */, $noreg :: (load 4)
940 ; CHECK: [[ADDri1:%[0-9]+]]:gpr = ADDri %fixed-stack.2, 0, 14 /* CC::al */, $noreg, $noreg
/external/llvm-project/llvm/lib/Target/ARM/
DARMMCInstLower.cpp139 case ARM::ADDri: in LowerARMMachineInstrToMCInst()
DARMInstructionSelector.cpp107 unsigned ADDri; member
320 STORE_OPCODE(ADDri, ADDri); in OpcodeCache()
1073 I.setDesc(TII.get(Opcodes.ADDri)); in select()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/ARM/
DARMMCInstLower.cpp139 case ARM::ADDri: in LowerARMMachineInstrToMCInst()

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