| /external/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 733 ATOMIC_LOAD_NAND, enumerator
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| D | SelectionDAGNodes.h | 1108 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
1189 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 878 ATOMIC_LOAD_NAND, enumerator
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| D | SelectionDAGNodes.h | 1407 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
1464 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
|
| /external/llvm-project/llvm/include/llvm/CodeGen/ |
| D | ISDOpcodes.h | 1063 ATOMIC_LOAD_NAND, enumerator
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| D | SelectionDAGNodes.h | 1367 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
1424 N->getOpcode() == ISD::ATOMIC_LOAD_NAND ||
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| /external/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 72 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 147 case ISD::ATOMIC_LOAD_NAND: in PromoteIntegerResult()
1342 case ISD::ATOMIC_LOAD_NAND: in ExpandIntegerResult()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 138 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); in Mips16TargetLowering()
|
| /external/llvm-project/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 138 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); in Mips16TargetLowering()
|
| /external/llvm/lib/Target/Mips/ |
| D | Mips16ISelLowering.cpp | 139 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Expand); in Mips16TargetLowering()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 177 case ISD::ATOMIC_LOAD_NAND: in PromoteIntegerResult()
1842 case ISD::ATOMIC_LOAD_NAND: in ExpandIntegerResult()
|
| /external/llvm-project/llvm/lib/CodeGen/SelectionDAG/ |
| D | SelectionDAGDumper.cpp | 93 case ISD::ATOMIC_LOAD_NAND: return "AtomicLoadNand"; in getOperationName()
|
| D | LegalizeIntegerTypes.cpp | 186 case ISD::ATOMIC_LOAD_NAND: in PromoteIntegerResult()
2071 case ISD::ATOMIC_LOAD_NAND: in ExpandIntegerResult()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 472 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_NAND, SYNC_FETCH_AND_NAND) in getSYNC()
|
| /external/llvm/lib/Target/AMDGPU/ |
| D | SIISelLowering.cpp | 249 setTargetDAGCombine(ISD::ATOMIC_LOAD_NAND); in SITargetLowering()
3015 case ISD::ATOMIC_LOAD_NAND: in PerformDAGCombine()
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| /external/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 747 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_NAND, SYNC_FETCH_AND_NAND) in getSYNC()
|
| /external/llvm-project/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 137 setOperationAction(ISD::ATOMIC_LOAD_NAND, VT, Expand); in AVRTargetLowering()
|
| /external/llvm-project/llvm/lib/CodeGen/ |
| D | TargetLoweringBase.cpp | 582 OP_TO_LIBCALL(ISD::ATOMIC_LOAD_NAND, SYNC_FETCH_AND_NAND) in getSYNC()
|
| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AVR/ |
| D | AVRISelLowering.cpp | 136 setOperationAction(ISD::ATOMIC_LOAD_NAND, VT, Expand); in AVRTargetLowering()
|
| /external/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 510 def atomic_load_nand: SDNode<"ISD::ATOMIC_LOAD_NAND", SDTAtomic2,
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| /external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 600 def atomic_load_nand: SDNode<"ISD::ATOMIC_LOAD_NAND", SDTAtomic2,
|
| /external/llvm-project/llvm/include/llvm/Target/ |
| D | TargetSelectionDAG.td | 609 def atomic_load_nand: SDNode<"ISD::ATOMIC_LOAD_NAND", SDTAtomic2,
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| /external/llvm/lib/Target/SystemZ/ |
| D | SystemZISelLowering.cpp | 210 setOperationAction(ISD::ATOMIC_LOAD_NAND, MVT::i32, Custom); in SystemZTargetLowering()
4545 case ISD::ATOMIC_LOAD_NAND: in LowerOperation()
|