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Searched refs:AXI_SPTDIVCR0 (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/renesas/common/
Dbl2_secure_setting.c306 {AXI_SPTDIVCR0, 0x0E0E6304U},
/external/arm-trusted-firmware/plat/renesas/common/include/registers/
Daxi_registers.h169 #define AXI_SPTDIVCR0 (AXI_BASE + 0x4500U) macro