/external/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCShuffler.cpp | 51 void HexagonMCShuffler::init(MCInst &MCB, MCInst const *AddMI, in init() argument 54 if (bInsertAtFront && AddMI) in init() 55 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, *AddMI), in init() 69 if (!bInsertAtFront && AddMI) in init() 70 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, *AddMI), in init() 205 MCInst &MCB, MCInst const *AddMI, int fixupCount) { in HexagonMCShuffle() argument 206 if (!HexagonMCInstrInfo::isBundle(MCB) || !AddMI) in HexagonMCShuffle() 224 HexagonMCShuffler MCS(MCII, STI, MCB, AddMI); in HexagonMCShuffle()
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D | HexagonMCShuffler.h | 36 MCInst &MCB, const MCInst *AddMI, 39 init(MCB, AddMI, bInsertAtFront); in HexagonShuffler() 52 void init(MCInst &MCB, const MCInst *AddMI, bool bInsertAtFront = false);
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/external/llvm-project/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCShuffler.cpp | 55 void HexagonMCShuffler::init(MCInst &MCB, MCInst const &AddMI, in init() argument 59 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI)); in init() 72 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI)); in init() 184 MCInst const &AddMI, int fixupCount) { in HexagonMCShuffle() argument 219 HexagonMCShuffler MCS(Context, false, MCII, STI, MCB, AddMI, false); in HexagonMCShuffle()
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D | HexagonMCShuffler.h | 39 MCInst const &AddMI, bool InsertAtFront) in HexagonMCShuffler() argument 41 init(MCB, AddMI, InsertAtFront); in HexagonMCShuffler() 52 void init(MCInst &MCB, MCInst const &AddMI, bool InsertAtFront); 60 MCInst const &AddMI, int fixupCount);
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/MCTargetDesc/ |
D | HexagonMCShuffler.cpp | 55 void HexagonMCShuffler::init(MCInst &MCB, MCInst const &AddMI, in init() argument 59 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI)); in init() 72 append(AddMI, nullptr, HexagonMCInstrInfo::getUnits(MCII, STI, AddMI)); in init() 184 MCInst const &AddMI, int fixupCount) { in HexagonMCShuffle() argument 219 HexagonMCShuffler MCS(Context, false, MCII, STI, MCB, AddMI, false); in HexagonMCShuffle()
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D | HexagonMCShuffler.h | 39 MCInst const &AddMI, bool InsertAtFront) in HexagonMCShuffler() argument 41 init(MCB, AddMI, InsertAtFront); in HexagonMCShuffler() 52 void init(MCInst &MCB, MCInst const &AddMI, bool InsertAtFront); 60 MCInst const &AddMI, int fixupCount);
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/external/llvm-project/llvm/lib/Target/Hexagon/ |
D | HexagonOptAddrMode.cpp | 94 bool processAddUses(NodeAddr<StmtNode *> AddSN, MachineInstr *AddMI, 96 bool updateAddUses(MachineInstr *AddMI, MachineInstr *UseMI); 349 MachineInstr *AddMI, in processAddUses() argument 352 Register AddDefR = AddMI->getOperand(0).getReg(); in processAddUses() 374 int64_t newOffset = OffsetOp.getImm() + AddMI->getOperand(2).getImm(); in processAddUses() 385 Register BaseReg = AddMI->getOperand(1).getReg(); in processAddUses() 386 if (!isSafeToExtLR(AddSN, AddMI, BaseReg, UNodeList)) in processAddUses() 402 Changed |= updateAddUses(AddMI, UseMI); in processAddUses() 406 Deleted.insert(AddMI); in processAddUses() 411 bool HexagonOptAddrMode::updateAddUses(MachineInstr *AddMI, in updateAddUses() argument [all …]
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
D | HexagonOptAddrMode.cpp | 94 bool processAddUses(NodeAddr<StmtNode *> AddSN, MachineInstr *AddMI, 96 bool updateAddUses(MachineInstr *AddMI, MachineInstr *UseMI); 349 MachineInstr *AddMI, in processAddUses() argument 352 Register AddDefR = AddMI->getOperand(0).getReg(); in processAddUses() 374 int64_t newOffset = OffsetOp.getImm() + AddMI->getOperand(2).getImm(); in processAddUses() 385 Register BaseReg = AddMI->getOperand(1).getReg(); in processAddUses() 386 if (!isSafeToExtLR(AddSN, AddMI, BaseReg, UNodeList)) in processAddUses() 402 Changed |= updateAddUses(AddMI, UseMI); in processAddUses() 406 Deleted.insert(AddMI); in processAddUses() 411 bool HexagonOptAddrMode::updateAddUses(MachineInstr *AddMI, in updateAddUses() argument [all …]
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/external/llvm/lib/Target/Sparc/ |
D | DelaySlotFiller.cpp | 378 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument 386 unsigned reg = AddMI->getOperand(0).getReg(); in combineRestoreADD() 394 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD() 399 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
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/external/llvm-project/llvm/lib/Target/Sparc/ |
D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument 383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD() 391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD() 396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Sparc/ |
D | DelaySlotFiller.cpp | 375 MachineBasicBlock::iterator AddMI, in combineRestoreADD() argument 383 Register reg = AddMI->getOperand(0).getReg(); in combineRestoreADD() 391 AddMI->setDesc(TII->get((AddMI->getOpcode() == SP::ADDrr) in combineRestoreADD() 396 AddMI->getOperand(0).setReg(reg - SP::I0 + SP::O0); in combineRestoreADD()
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/external/llvm-project/llvm/lib/Target/AArch64/ |
D | AArch64CollectLOH.cpp | 402 const MachineInstr *AddMI = Info.MI0; in handleADRP() local 404 int OpIdx = mapRegToGPRIndex(AddMI->getOperand(0).getReg()); in handleADRP()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/ |
D | AArch64InstructionSelector.cpp | 3251 auto AddMI = MIRBuilder.buildInstr(Opc, {DefReg}, {LHS.getReg()}); in emitADD() local 3256 RenderFn(AddMI); in emitADD() 3258 AddMI.addUse(RHS.getReg()); in emitADD() 3261 constrainSelectedInstRegOperands(*AddMI, TII, TRI, RBI); in emitADD() 3262 return &*AddMI; in emitADD()
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