B14 (reference) in projects: external - OpenGrok search results

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Searched refs:B14 (Results 1 – 25 of 62) sorted by relevance

12 3

/external/llvm-project/llvm/test/CodeGen/ARM/ParallelDSP/
D	unroll-n-jam-smlad.ll	`142 %B14 = load i16, i16* %arrayidx5.us.i.2349.i, align 2 143 %conv6.us.i.2350.i = sext i16 %B14 to i32 152 %B14.dup = load i16, i16* %arrayidx5.us.i.1.2.i, align 2 153 %conv6.us.i.1.2.i = sext i16 %B14.dup to i32 162 %B14.dup.i = load i16, i16* %arrayidx5.us.i.2.2.i, align 2 163 %conv6.us.i.2.2.i = sext i16 %B14.dup.i to i32 172 %B14.dup.i.i = load i16, i16* %arrayidx5.us.i.3.2.i, align 2 173 %conv6.us.i.3.2.i = sext i16 %B14.dup.i.i to i32`
/external/llvm/lib/Target/AArch64/Utils/
D	AArch64BaseInfo.h	`126 case AArch64::D14: return AArch64::B14; in getBRegFromDReg() 166 case AArch64::B14: return AArch64::D14; in getDRegFromBReg()`
/external/llvm/lib/Target/AArch64/
D	AArch64RegisterInfo.td	`230 def B14 : AArch64Reg<14, "b14">, DwarfRegNum<[78]>; 264 def H14 : AArch64Reg<14, "h14", [B14]>, DwarfRegAlias<B14>; 299 def S14 : AArch64Reg<14, "s14", [H14]>, DwarfRegAlias<B14>; 334 def D14 : AArch64Reg<14, "d14", [S14], ["v14", ""]>, DwarfRegAlias<B14>; 369 def Q14 : AArch64Reg<14, "q14", [D14], ["v14", ""]>, DwarfRegAlias<B14>;`
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/Utils/
D	AArch64BaseInfo.h	`125 case AArch64::D14: return AArch64::B14; in getBRegFromDReg() 165 case AArch64::B14: return AArch64::D14; in getDRegFromBReg()`
/external/llvm-project/llvm/lib/Target/AArch64/Utils/
D	AArch64BaseInfo.h	`125 case AArch64::D14: return AArch64::B14; in getBRegFromDReg() 165 case AArch64::B14: return AArch64::D14; in getDRegFromBReg()`
/external/llvm-project/llvm/test/Transforms/InstCombine/
D	apint-shift.ll	`556 ; CHECK-NEXT: [[B14:%.]] = add i177 [[L1]], [[B5_NEG]] 557 ; CHECK-NEXT: [[TMP2:%.]] = icmp eq i177 [[B14]], -1 569 %B14 = sub i177 %B20, %B5 570 %B1 = udiv i177 %B14, %B6`
/external/harfbuzz_ng/test/shaping/data/text-rendering-tests/tests/
D	SHBALI-1.tests	`6 ….ttf:--font-size=1000 --ned --remove-default-ignorables --font-funcs=ft:U+1B14,U+1B36:[gid24\|gid58…`
/external/llvm-project/llvm/test/CodeGen/X86/
D	combine-srem.ll	`406 %B14 = srem i32 %B11, %B13 407 %B16 = srem i32 %L6, %B14 408 %B10 = udiv i32 %L6, %B14`
D	fmaddsub-combine.ll	`303 %B14 = extractelement <16 x float> %B, i32 14 304 %sub14 = fsub float %A14, %B14 572 %B14 = extractelement <16 x float> %B, i32 14 573 %sub14 = fadd float %A14, %B14`
/external/llvm-project/llvm/lib/Target/AArch64/
D	AArch64RegisterInfo.td	`266 def B14 : AArch64Reg<14, "b14">, DwarfRegNum<[78]>; 300 def H14 : AArch64Reg<14, "h14", [B14]>, DwarfRegAlias<B14>; 335 def S14 : AArch64Reg<14, "s14", [H14]>, DwarfRegAlias<B14>; 370 def D14 : AArch64Reg<14, "d14", [S14], ["v14", ""]>, DwarfRegAlias<B14>; 405 def Q14 : AArch64Reg<14, "q14", [D14], ["v14", ""]>, DwarfRegAlias<B14>;`
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/AArch64/
D	AArch64RegisterInfo.td	`263 def B14 : AArch64Reg<14, "b14">, DwarfRegNum<[78]>; 297 def H14 : AArch64Reg<14, "h14", [B14]>, DwarfRegAlias<B14>; 332 def S14 : AArch64Reg<14, "s14", [H14]>, DwarfRegAlias<B14>; 367 def D14 : AArch64Reg<14, "d14", [S14], ["v14", ""]>, DwarfRegAlias<B14>; 402 def Q14 : AArch64Reg<14, "q14", [D14], ["v14", ""]>, DwarfRegAlias<B14>;`
/external/harfbuzz_ng/test/shaping/data/in-house/tests/
D	indic-vowel-letter-spoofing.tests	`40 ../fonts/2c25beb56d9c556622d56b0b5d02b4670c034f89.ttf::U+0B14,U+0020,U+0B13,U+0B57:[auorya=0+1679\|s…`
/external/protobuf/python/google/protobuf/internal/
D	more_messages.proto	`118 message B14 {} message`
/external/OpenCSD/decoder/tests/snapshots/a55-test-tpiu/
D	device1.ini	`85 B14=0x00000000 key`
/external/OpenCSD/decoder/tests/snapshots/a57_single_step/
D	device1.ini	`85 B14=0x00000000 key`
/external/swiftshader/third_party/subzero/src/
D	IceAssemblerARM32.cpp	`50 static constexpr IValueT B14 = 1 << 14; variable 1071 B25 \| B24 \| B20 \| B15 \| B14 \| B13 \| B12 \| B4 \| in emitDivOp() 1524 B21 \| B20 \| B19 \| B18 \| B17 \| B16 \| B15 \| B14 \| B13 \| B12 \| B6 \| B4 \| in dmb() 1851 B24 \| B21 \| B15 \| B14 \| B13 \| B12; in nop() 3293 IValueT Encoding = B27 \| B26 \| B25 \| B23 \| B22 \| B21 \| B20 \| B16 \| B15 \| B14 \| in vmrsAPSR_nzcv()`
/external/crosvm/devices/src/usb/xhci/
D	xhci_abi.rs	`333 reserved3: B14,`
/external/llvm-project/llvm/test/Transforms/SLPVectorizer/X86/
D	arith-fix.ll	182 ; SSE-NEXT: [[B14:%.]] = load i32, i32 getelementptr inbounds ([16 x i32], [16 x i32]* @b32, i… 198 ; SSE-NEXT: [[R14:%.]] = call i32 @llvm.smul.fix.i32(i32 [[A14]], i32 [[B14]], i32 3) 249 ; SLM-NEXT: [[B14:%.]] = load i32, i32* getelementptr inbounds ([16 x i32], [16 x i32]* @b32, i… 265 ; SLM-NEXT: [[R14:%.]] = call i32 @llvm.smul.fix.i32(i32 [[A14]], i32 [[B14]], i32 3) 316 ; AVX1-NEXT: [[B14:%.]] = load i32, i32* getelementptr inbounds ([16 x i32], [16 x i32]* @b32, … 332 ; AVX1-NEXT: [[R14:%.]] = call i32 @llvm.smul.fix.i32(i32 [[A14]], i32 [[B14]], i32 3) 1111 ; SSE-NEXT: [[B14:%.]] = load i32, i32* getelementptr inbounds ([16 x i32], [16 x i32]* @b32, i… 1127 ; SSE-NEXT: [[R14:%.]] = call i32 @llvm.umul.fix.i32(i32 [[A14]], i32 [[B14]], i32 3) 1178 ; SLM-NEXT: [[B14:%.]] = load i32, i32* getelementptr inbounds ([16 x i32], [16 x i32]* @b32, i… 1194 ; SLM-NEXT: [[R14:%.*]] = call i32 @llvm.umul.fix.i32(i32 [[A14]], i32 [[B14]], i32 3) [all …]
D	arith-mul-umulo.ll	147 ; CHECK-NEXT: [[B14:%.]] = load i32, i32 getelementptr inbounds ([16 x i32], [16 x i32]* @b32,… 163 ; CHECK-NEXT: [[C14:%.]] = call { i32, i1 } @llvm.umul.with.overflow.i32(i32 [[A14]], i32 [[B14… 330 ; CHECK-NEXT: [[B14:%.]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,… 362 ; CHECK-NEXT: [[C14:%.]] = call { i16, i1 } @llvm.umul.with.overflow.i16(i16 [[A14]], i16 [[B14… 689 ; CHECK-NEXT: [[B14:%.]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 … 753 ; CHECK-NEXT: [[C14:%.*]] = call { i8, i1 } @llvm.umul.with.overflow.i8(i8 [[A14]], i8 [[B14]])
D	arith-add-uaddo.ll	147 ; CHECK-NEXT: [[B14:%.]] = load i32, i32 getelementptr inbounds ([16 x i32], [16 x i32]* @b32,… 163 ; CHECK-NEXT: [[C14:%.]] = call { i32, i1 } @llvm.uadd.with.overflow.i32(i32 [[A14]], i32 [[B14… 330 ; CHECK-NEXT: [[B14:%.]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,… 362 ; CHECK-NEXT: [[C14:%.]] = call { i16, i1 } @llvm.uadd.with.overflow.i16(i16 [[A14]], i16 [[B14… 689 ; CHECK-NEXT: [[B14:%.]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 … 753 ; CHECK-NEXT: [[C14:%.*]] = call { i8, i1 } @llvm.uadd.with.overflow.i8(i8 [[A14]], i8 [[B14]])
D	arith-mul-smulo.ll	147 ; CHECK-NEXT: [[B14:%.]] = load i32, i32 getelementptr inbounds ([16 x i32], [16 x i32]* @b32,… 163 ; CHECK-NEXT: [[C14:%.]] = call { i32, i1 } @llvm.smul.with.overflow.i32(i32 [[A14]], i32 [[B14… 330 ; CHECK-NEXT: [[B14:%.]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,… 362 ; CHECK-NEXT: [[C14:%.]] = call { i16, i1 } @llvm.smul.with.overflow.i16(i16 [[A14]], i16 [[B14… 689 ; CHECK-NEXT: [[B14:%.]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 … 753 ; CHECK-NEXT: [[C14:%.*]] = call { i8, i1 } @llvm.smul.with.overflow.i8(i8 [[A14]], i8 [[B14]])
D	arith-sub-usubo.ll	147 ; CHECK-NEXT: [[B14:%.]] = load i32, i32 getelementptr inbounds ([16 x i32], [16 x i32]* @b32,… 163 ; CHECK-NEXT: [[C14:%.]] = call { i32, i1 } @llvm.usub.with.overflow.i32(i32 [[A14]], i32 [[B14… 330 ; CHECK-NEXT: [[B14:%.]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,… 362 ; CHECK-NEXT: [[C14:%.]] = call { i16, i1 } @llvm.usub.with.overflow.i16(i16 [[A14]], i16 [[B14… 689 ; CHECK-NEXT: [[B14:%.]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 … 753 ; CHECK-NEXT: [[C14:%.*]] = call { i8, i1 } @llvm.usub.with.overflow.i8(i8 [[A14]], i8 [[B14]])
D	arith-sub-ssubo.ll	147 ; CHECK-NEXT: [[B14:%.]] = load i32, i32 getelementptr inbounds ([16 x i32], [16 x i32]* @b32,… 163 ; CHECK-NEXT: [[C14:%.]] = call { i32, i1 } @llvm.ssub.with.overflow.i32(i32 [[A14]], i32 [[B14… 330 ; CHECK-NEXT: [[B14:%.]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,… 362 ; CHECK-NEXT: [[C14:%.]] = call { i16, i1 } @llvm.ssub.with.overflow.i16(i16 [[A14]], i16 [[B14… 689 ; CHECK-NEXT: [[B14:%.]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 … 753 ; CHECK-NEXT: [[C14:%.*]] = call { i8, i1 } @llvm.ssub.with.overflow.i8(i8 [[A14]], i8 [[B14]])
D	arith-add-saddo.ll	147 ; CHECK-NEXT: [[B14:%.]] = load i32, i32 getelementptr inbounds ([16 x i32], [16 x i32]* @b32,… 163 ; CHECK-NEXT: [[C14:%.]] = call { i32, i1 } @llvm.sadd.with.overflow.i32(i32 [[A14]], i32 [[B14… 330 ; CHECK-NEXT: [[B14:%.]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16,… 362 ; CHECK-NEXT: [[C14:%.]] = call { i16, i1 } @llvm.sadd.with.overflow.i16(i16 [[A14]], i16 [[B14… 689 ; CHECK-NEXT: [[B14:%.]] = load i8, i8* getelementptr inbounds ([64 x i8], [64 x i8]* @b8, i32 … 753 ; CHECK-NEXT: [[C14:%.*]] = call { i8, i1 } @llvm.sadd.with.overflow.i8(i8 [[A14]], i8 [[B14]])
D	shift-lshr.ll	`158 ; SSE-NEXT: [[B14:%.]] = load i32, i32 getelementptr inbounds ([16 x i32], [16 x i32]* @b32, i… 174 ; SSE-NEXT: [[R14:%.]] = lshr i32 [[A14]], [[B14]] 338 ; SSE-NEXT: [[B14:%.]] = load i16, i16* getelementptr inbounds ([32 x i16], [32 x i16]* @b16, i… 370 ; SSE-NEXT: [[R14:%.*]] = lshr i16 [[A14]], [[B14]]`

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