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Searched refs:BNE (Results 1 – 25 of 139) sorted by relevance

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/external/libhevc/common/arm64/
Dihevc_mem_fns.s87 BNE LOOP_NEON_MEMCPY_MUL_8
127 BNE LOOP_ARM_MEMCPY
159 BNE LOOP_MEMSET_MUL_8
198 BNE LOOP_ARM_MEMSET
232 BNE LOOP_MEMSET_16BIT_MUL_8
271 BNE LOOP_ARM_MEMSET_16BIT
Dihevc_sao_band_offset_luma.s97 BNE SRC_LEFT_LOOP
121 BNE SRC_TOP_LOOP
151 BNE SAO_BAND_POS_29
159 BNE SAO_BAND_POS_30
169 BNE SAO_BAND_POS_31
177 BNE SWITCH_BREAK
186 BNE SWITCH_BREAK
236 BNE HEIGHT_LOOP
240 BNE SWITCH_BREAK_1
Dihevc_sao_band_offset_chroma.s111 BNE SRC_LEFT_LOOP
138 BNE SRC_TOP_LOOP
174 BNE SAO_BAND_POS_U_29
183 BNE SAO_BAND_POS_U_30
193 BNE SAO_BAND_POS_U_31
200 BNE SWITCH_BREAK_U
210 BNE SWITCH_BREAK_U
249 BNE SAO_BAND_POS_V_29
257 BNE SAO_BAND_POS_V_30
267 BNE SAO_BAND_POS_V_31
[all …]
Dihevc_sao_edge_offset_class3.s111 BNE AU1_SRC_TOP_LOOP
259 BNE SKIP_AU1_MASK_VAL
294 BNE AU1_SRC_LEFT_LOOP
316 BNE SIGN_UP_CHANGE_DONE //I
399 BNE NEXT_ROW_ELSE_2 //III
569 BNE SRC_LEFT_LOOP
594 BNE SKIP_AU1_MASK_VAL_WD_16_HT_4
623 BNE AU1_SRC_LEFT_LOOP_WD_16_HT_4
656 BNE SIGN_UP_CHANGE_WD_16_HT_4
660 BNE SIGN_UP_CHANGE_DONE_WD_16_HT_4
[all …]
Dihevc_sao_edge_offset_class2.s111 BNE AU1_SRC_TOP_LOOP
250 BNE SKIP_AU1_MASK_VAL
287 BNE AU1_SRC_LEFT_LOOP
302 BNE SIGN_UP_CHANGE_DONE //I
543 BNE SRC_LEFT_LOOP
567 BNE SKIP_AU1_MASK_VAL_WD_16_HT_4
604 BNE AU1_SRC_LEFT_LOOP_WD_16_HT_4
622 BNE SIGN_UP_CHANGE_DONE_WD_16_HT_4
671 BNE PU1_SRC_LOOP_WD_16_HT_4 //If not equal jump to PU1_SRC_LOOP_WD_16_HT_4
683 BNE SRC_LEFT_LOOP_WD_16_HT_4
[all …]
Dihevc_sao_edge_offset_class0.s113 BNE SRC_TOP_LOOP
124 BNE AU1_MASK_FF //jump to else part
135 BNE SKIP_MASKING_IF_NOT16 //If not skip masking
254 BNE PU1_SRC_LOOP //If not equal jump to the inner loop
272 BNE AU1_MASK_FF_RESIDUE //jump to else part
335 BNE PU1_SRC_LOOP_RESIDUE //If not equal jump to the pu1_src loop
Dihevc_sao_edge_offset_class3_chroma.s122 BNE AU1_SRC_TOP_LOOP
301 BNE PU1_AVAIL_2_LOOP
307 BNE PU1_AVAIL_2_LOOP_END
349 BNE SKIP_AU1_MASK_VAL
390 BNE AU1_SRC_LEFT_LOOP
410 BNE SIGN_UP_CHANGE_DONE //I
534 BNE NEXT_ROW_POINTER_ASSIGNED_2 //III
670 BNE NEXT_ROW_POINTER_ASSIGNED_3
753 BNE SRC_LEFT_LOOP
782 BNE SKIP_AU1_MASK_VAL_WD_16_HT_4
[all …]
Dihevc_sao_edge_offset_class2_chroma.s125 BNE AU1_SRC_TOP_LOOP
358 BNE SKIP_AU1_MASK_VAL
400 BNE AU1_SRC_LEFT_LOOP
420 BNE SIGN_UP_CHANGE_DONE //I
762 BNE SRC_LEFT_LOOP
790 BNE SKIP_AU1_MASK_VAL_WD_16_HT_4
822 BNE AU1_SRC_LEFT_LOOP_WD_16_HT_4
851 BNE SIGN_UP_CHANGE_DONE_WD_16_HT_4
923 BNE PU1_SRC_LOOP_WD_16_HT_4 //If not equal jump to PU1_SRC_LOOP_WD_16_HT_4
934 BNE SRC_LEFT_LOOP_WD_16_HT_4
[all …]
Dihevc_sao_edge_offset_class0_chroma.s129 BNE SRC_TOP_LOOP
142 BNE AU1_MASK_FF //jump to else part
154 BNE SKIP_MASKING_IF_NOT16 //If not skip masking
311 BNE PU1_SRC_LOOP //If not equal jump to the inner loop
329 BNE AU1_MASK_FF_RESIDUE //jump to else part
471 BNE PU1_SRC_LOOP_RESIDUE //If not equal jump to the pu1_src loop
/external/libhevc/common/arm/
Dihevc_mem_fns.s89 BNE LOOP_NEON_MEMCPY_MUL_8
129 BNE LOOP_ARM_MEMCPY
160 BNE LOOP_MEMSET_MUL_8
199 BNE LOOP_ARM_MEMSET
232 BNE LOOP_MEMSET_16BIT_MUL_8
272 BNE LOOP_ARM_MEMSET_16BIT
Dihevc_sao_band_offset_luma.s97 BNE SRC_LEFT_LOOP
122 BNE SRC_TOP_LOOP
152 BNE SAO_BAND_POS_29
160 BNE SAO_BAND_POS_30
170 BNE SAO_BAND_POS_31
178 BNE SWITCH_BREAK
187 BNE SWITCH_BREAK
230 BNE HEIGHT_LOOP
234 BNE SWITCH_BREAK
Dihevc_sao_band_offset_chroma.s104 BNE SRC_LEFT_LOOP
130 BNE SRC_TOP_LOOP
167 BNE SAO_BAND_POS_U_29
176 BNE SAO_BAND_POS_U_30
186 BNE SAO_BAND_POS_U_31
193 BNE SWITCH_BREAK_U
203 BNE SWITCH_BREAK_U
242 BNE SAO_BAND_POS_V_29
250 BNE SAO_BAND_POS_V_30
260 BNE SAO_BAND_POS_V_31
[all …]
Dihevc_sao_edge_offset_class3.s115 BNE AU1_SRC_TOP_LOOP
242 BNE SKIP_AU1_MASK_VAL
279 BNE AU1_SRC_LEFT_LOOP
303 BNE SIGN_UP_CHANGE_DONE @I
386 BNE NEXT_ROW_ELSE_2 @III
552 BNE SRC_LEFT_LOOP
575 BNE SKIP_AU1_MASK_VAL_WD_16_HT_4
604 BNE AU1_SRC_LEFT_LOOP_WD_16_HT_4
639 BNE SIGN_UP_CHANGE_WD_16_HT_4
643 BNE SIGN_UP_CHANGE_DONE_WD_16_HT_4
[all …]
Dihevc_sao_edge_offset_class3_chroma.s124 BNE AU1_SRC_TOP_LOOP
271 BNE PU1_AVAIL_2_LOOP
277 BNE PU1_AVAIL_2_LOOP_END
317 BNE SKIP_AU1_MASK_VAL
357 BNE AU1_SRC_LEFT_LOOP
377 BNE SIGN_UP_CHANGE_DONE @I
488 BNE NEXT_ROW_POINTER_ASSIGNED_2 @III
609 BNE NEXT_ROW_POINTER_ASSIGNED_3
682 BNE SRC_LEFT_LOOP
709 BNE SKIP_AU1_MASK_VAL_WD_16_HT_4
[all …]
Dihevc_sao_edge_offset_class2.s117 BNE AU1_SRC_TOP_LOOP
232 BNE SKIP_AU1_MASK_VAL
271 BNE AU1_SRC_LEFT_LOOP
288 BNE SIGN_UP_CHANGE_DONE @I
522 BNE SRC_LEFT_LOOP
544 BNE SKIP_AU1_MASK_VAL_WD_16_HT_4
583 BNE AU1_SRC_LEFT_LOOP_WD_16_HT_4
603 BNE SIGN_UP_CHANGE_DONE_WD_16_HT_4
649 BNE PU1_SRC_LOOP_WD_16_HT_4 @If not equal jump to PU1_SRC_LOOP_WD_16_HT_4
661 BNE SRC_LEFT_LOOP_WD_16_HT_4
[all …]
/external/llvm-project/llvm/test/CodeGen/RISCV/
Dselect-optimize-multiple.mir54 ; RV32I: BNE [[ANDI]], [[COPY4]], %bb.2
60 ; RV32I: BNE [[ANDI]], [[COPY4]], %bb.4
76 ; RV64I: BNE [[ANDI]], [[COPY4]], %bb.2
82 ; RV64I: BNE [[ANDI]], [[COPY4]], %bb.4
142 ; RV32I: BNE [[ANDI]], [[COPY4]], %bb.2
163 ; RV64I: BNE [[ANDI]], [[COPY4]], %bb.2
/external/libxaac/decoder/armv7/
Dixheaacd_imdct_using_fft.s50 BNE COND_2
57 BNE COND_3
64 BNE COND_4
71 BNE COND_5
78 BNE COND_6
454 BNE RADIX_8_FIRST_LOOP
605 BNE RADIX_4_LOOP
737 BNE BYPASS_IF
805 BNE INNER_LOOP_R4
811 BNE MIDDLE_LOOP_R4
[all …]
/external/llvm-project/llvm/test/CodeGen/Mips/
D2011-05-26-BranchKillsVreg.ll5 ; This requires updating the BNE-J terminators to a BEQ. The BNE instruction
/external/llvm/test/CodeGen/Mips/
D2011-05-26-BranchKillsVreg.ll5 ; This requires updating the BNE-J terminators to a BEQ. The BNE instruction
/external/llvm-project/llvm/test/CodeGen/Mips/GlobalISel/instruction-select/
Dphi.mir82 ; MIPS32FP32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
101 ; MIPS32FP64: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
157 ; MIPS32FP32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
182 ; MIPS32FP64: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
239 ; MIPS32FP32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
258 ; MIPS32FP64: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
310 ; MIPS32FP32: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
330 ; MIPS32FP64: BNE [[ANDi]], $zero, %bb.1, implicit-def $at
/external/llvm-project/llvm/lib/Target/RISCV/
DRISCVExpandAtomicPseudoInsts.cpp250 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doAtomicBinOpExpansion()
335 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doMaskedAtomicBinOpExpansion()
494 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicMinMaxOp()
549 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
559 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
574 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
590 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Mips/
DMipsExpandPseudo.cpp85 unsigned BNE = Mips::BNE; in expandAtomicCmpSwapSubword() local
93 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwapSubword()
149 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwapSubword()
213 unsigned LL, SC, ZERO, BNE, BEQ, MOVE; in expandAtomicCmpSwap() local
219 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwap()
228 BNE = Mips::BNE; in expandAtomicCmpSwap()
238 BNE = Mips::BNE64; in expandAtomicCmpSwap()
279 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwap()
/external/llvm-project/llvm/lib/Target/Mips/
DMipsExpandPseudo.cpp85 unsigned BNE = Mips::BNE; in expandAtomicCmpSwapSubword() local
93 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwapSubword()
149 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwapSubword()
213 unsigned LL, SC, ZERO, BNE, BEQ, MOVE; in expandAtomicCmpSwap() local
219 BNE = STI->hasMips32r6() ? Mips::BNEC_MMR6 : Mips::BNE_MM; in expandAtomicCmpSwap()
228 BNE = Mips::BNE; in expandAtomicCmpSwap()
238 BNE = Mips::BNE64; in expandAtomicCmpSwap()
279 BuildMI(loop1MBB, DL, TII->get(BNE)) in expandAtomicCmpSwap()
/external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/RISCV/
DRISCVExpandPseudoInsts.cpp267 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doAtomicBinOpExpansion()
352 BuildMI(LoopMBB, DL, TII->get(RISCV::BNE)) in doMaskedAtomicBinOpExpansion()
511 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicMinMaxOp()
566 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
576 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
591 BuildMI(LoopHeadMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
607 BuildMI(LoopTailMBB, DL, TII->get(RISCV::BNE)) in expandAtomicCmpXchg()
/external/libxaac/decoder/armv8/
Dixheaacd_imdct_using_fft.s68 BNE COND_2
74 BNE COND_3
80 BNE COND_4
86 BNE COND_5
92 BNE COND_6
452 BNE RADIX_8_FIRST_LOOP
600 BNE RADIX_4_LOOP
721 BNE BYPASS_IF
798 BNE INNER_LOOP_R4
804 BNE MIDDLE_LOOP_R4
[all …]

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