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Searched refs:BRW_CHANNEL_X (Results 1 – 12 of 12) sorted by relevance

/external/igt-gpu-tools/assembler/
Dgen8_disasm.c512 if (swz_x == BRW_CHANNEL_X && in src_da16()
563 if (swz_x == BRW_CHANNEL_X &&
616 if (swz_x == BRW_CHANNEL_X &&
668 if (swz_x == BRW_CHANNEL_X &&
Dlex.l65 yylval.integer = BRW_CHANNEL_X;
267 yylval.integer = BRW_CHANNEL_X;
Dgen8_instruction.c209 BRW_CHANNEL_X)); in gen8_set_src0()
297 BRW_CHANNEL_X)); in gen8_set_src1()
Dbrw_disasm.c681 if (swz_x == BRW_CHANNEL_X && in src_da16()
730 if (swz_x == BRW_CHANNEL_X && in src0_3src()
782 if (swz_x == BRW_CHANNEL_X && in src1_3src()
833 if (swz_x == BRW_CHANNEL_X && in src2_3src()
Dbrw_defines.h554 #define BRW_CHANNEL_X 0 macro
Dbrw_eu_emit.c333 insn->bits2.da16.src0_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); in brw_set_src0()
420 insn->bits3.da16.src1_swz_x = BRW_GET_SWZ(reg.dw1.bits.swizzle, BRW_CHANNEL_X); in brw_set_src1()
Dgram.y2821 | X { $$ = 1 << BRW_CHANNEL_X; }
/external/mesa3d/src/intel/tools/
Di965_lex.l206 <DOTSEL>"x" { yylval.integer = BRW_CHANNEL_X; return X; }
245 <CHANNEL>"x" { yylval.integer = BRW_CHANNEL_X; return X; }
Di965_gram.y2124 | X { $$ = 1 << BRW_CHANNEL_X; }
/external/mesa3d/src/intel/compiler/
Dbrw_eu_defines.h103 #define BRW_CHANNEL_X 0 macro
Dbrw_eu_emit.c311 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_X)); in brw_set_src0()
418 BRW_GET_SWZ(reg.swizzle, BRW_CHANNEL_X)); in brw_set_src1()
Dbrw_disasm.c955 unsigned x = BRW_GET_SWZ(swiz, BRW_CHANNEL_X); in src_swizzle()