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Searched refs:BRW_VERTICAL_STRIDE_8 (Results 1 – 12 of 12) sorted by relevance

/external/igt-gpu-tools/assembler/
Dbrw_eu_debug.c61 hwreg.vstride == BRW_VERTICAL_STRIDE_8 && in brw_print_reg()
Dgen8_instruction.c223 if (reg.vstride == BRW_VERTICAL_STRIDE_8) in gen8_set_src0()
311 if (reg.vstride == BRW_VERTICAL_STRIDE_8) in gen8_set_src1()
Dbrw_reg.h246 BRW_VERTICAL_STRIDE_8, in brw_vec8_reg()
Dbrw_defines.h824 #define BRW_VERTICAL_STRIDE_8 4 macro
Dbrw_eu_emit.c341 if (reg.vstride == BRW_VERTICAL_STRIDE_8) in brw_set_src0()
428 if (reg.vstride == BRW_VERTICAL_STRIDE_8) in brw_set_src1()
/external/mesa3d/src/intel/compiler/
Dbrw_eu_defines.h1025 BRW_VERTICAL_STRIDE_8 = 4, enumerator
Dbrw_fs_builder.h752 if (src.vstride != BRW_VERTICAL_STRIDE_8 || in fix_3src_operand()
Dbrw_reg.h477 BRW_VERTICAL_STRIDE_8, in brw_vec8_reg()
Dbrw_eu_emit.c319 if (reg.vstride == BRW_VERTICAL_STRIDE_8) { in brw_set_src0()
426 if (reg.vstride == BRW_VERTICAL_STRIDE_8) { in brw_set_src1()
759 case BRW_VERTICAL_STRIDE_8: in to_3src_align1_vstride()
1221 src1.vstride = BRW_VERTICAL_STRIDE_8; in brw_PLN()
Dbrw_disasm.c1026 case BRW_ALIGN1_3SRC_VERTICAL_STRIDE_8: return BRW_VERTICAL_STRIDE_8; in vstride_from_align1_3src_vstride()
1075 case BRW_VERTICAL_STRIDE_8: return BRW_WIDTH_8; in implied_width()
Dtest_eu_validate.cpp838 { BRW_VERTICAL_STRIDE_8, false }, in TEST_P()
1059 brw_inst_set_src1_vstride(&devinfo, last_inst, BRW_VERTICAL_STRIDE_8); in TEST_P()
Dbrw_fs.cpp3334 BRW_VERTICAL_STRIDE_8, BRW_WIDTH_2, BRW_HORIZONTAL_STRIDE_4, in emit_repclear_shader()