Searched refs:Bit1 (Results 1 – 9 of 9) sorted by relevance
| /external/llvm-project/mlir/unittests/TableGen/ |
| D | EnumsGenTest.cpp | 63 EXPECT_EQ(1u, static_cast<uint32_t>(BitEnumWithNone::Bit1)); in TEST()
69 EXPECT_EQ(stringifyBitEnumWithNone(BitEnumWithNone::Bit1), "Bit1"); in TEST()
72 stringifyBitEnumWithNone(BitEnumWithNone::Bit1 | BitEnumWithNone::Bit3), in TEST()
78 EXPECT_EQ(symbolizeBitEnumWithNone("Bit1"), BitEnumWithNone::Bit1); in TEST()
81 BitEnumWithNone::Bit3 | BitEnumWithNone::Bit1); in TEST()
90 EXPECT_TRUE(bitEnumContains(BitEnumWithNone::Bit1 | BitEnumWithNone::Bit3, in TEST()
91 BitEnumWithNone::Bit1)); in TEST()
92 EXPECT_FALSE(bitEnumContains(BitEnumWithNone::Bit1 & BitEnumWithNone::Bit3, in TEST()
93 BitEnumWithNone::Bit1)); in TEST()
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| D | enums.td | 26 def Bit1 : BitEnumAttrCase<"Bit1", 0x0001>;
30 [Bit0, Bit1, Bit3]>;
33 [Bit1, Bit3]>;
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| /external/rust/crates/grpcio-sys/grpc/third_party/re2/util/ |
| D | rune.cc | 24 Bit1 = 7, enumerator
31 T1 = ((1<<(Bit1+1))-1) ^ 0xFF, /* 0000 0000 */
38 Rune1 = (1<<(Bit1+0*Bitx))-1, /* 0000 0000 0111 1111 */
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| /external/libutf/ |
| D | rune.c | 21 Bit1 = 7, enumerator
28 T1 = ((1<<(Bit1+1))-1) ^ 0xFF, /* 0000 0000 */
35 Rune1 = (1<<(Bit1+0*Bitx))-1, /* 0000 0000 0111 1111 */
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| /external/llvm-project/llvm/utils/TableGen/ |
| D | X86FoldTablesEmitter.cpp | 218 BitInit *Bit1 = cast<BitInit>(B1->getBit(i)); in equalBitsInits() local
220 if (Bit1->getValue() != Bit2->getValue()) in equalBitsInits()
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| /external/swiftshader/third_party/llvm-10.0/llvm/lib/Target/Hexagon/ |
| D | HexagonGenInsert.cpp | 361 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN; in operator ()() local
368 if (W1 <= Bit1) in operator ()()
374 const BitTracker::BitValue &V1 = RC1[Bit1], V2 = RC2[Bit2]; in operator ()()
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| /external/llvm-project/llvm/lib/Target/Hexagon/ |
| D | HexagonGenInsert.cpp | 361 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN; in operator ()() local
368 if (W1 <= Bit1) in operator ()()
374 const BitTracker::BitValue &V1 = RC1[Bit1], V2 = RC2[Bit2]; in operator ()()
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| /external/llvm/lib/Target/Hexagon/ |
| D | HexagonGenInsert.cpp | 337 uint16_t Bit1 = (VR1 == SelR) ? SelB : BitN; in operator ()() local
344 if (W1 <= Bit1) in operator ()()
350 const BitTracker::BitValue &V1 = RC1[Bit1], V2 = RC2[Bit2]; in operator ()()
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| /external/llvm-project/mlir/docs/ |
| D | OpDefinitions.md | 1374 def Bit1: BitEnumAttrCase<"Bit1", 0x0001>;
1379 [None, Bit1, Bit2, Bit3]>;
1388 Bit1 = 1,
1435 if (1u & val) { strs.push_back("Bit1"); val &= ~1u; }
1453 .Case("Bit1", 1)
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