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Searched refs:CRU_DPLL_CON2 (Results 1 – 2 of 2) sorted by relevance

/external/arm-trusted-firmware/plat/rockchip/rk3399/include/shared/
Dmisc_regs.h13 #define CRU_DPLL_CON2 0x48 macro
/external/arm-trusted-firmware/plat/rockchip/rk3399/drivers/m0/src/
Ddram.c52 while ((mmio_read_32(CRU_BASE + CRU_DPLL_CON2) & (1u << 31)) == 0) in ddr_set_pll()