/external/llvm/lib/CodeGen/GlobalISel/ |
D | RegisterBankInfo.cpp | 93 const TargetRegisterClass &CurRC = *TRI.getRegClass(RCId); in addRegBankCoverage() local 95 DEBUG(dbgs() << "Examine: " << TRI.getRegClassName(&CurRC) in addRegBankCoverage() 96 << "(Size*8: " << (CurRC.getSize() * 8) << ")\n"); in addRegBankCoverage() 99 MaxSize = std::max(MaxSize, CurRC.getSize() * 8); in addRegBankCoverage() 105 make_range(CurRC.vt_begin(), CurRC.vt_end())) in addRegBankCoverage() 110 for (BitMaskClassIterator It(CurRC.getSubClassMask(), TRI); It.isValid(); in addRegBankCoverage()
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/external/llvm-project/llvm/lib/CodeGen/ |
D | MachineInstr.cpp | 915 Register Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, in getRegClassConstraintEffectForVReg() argument 920 for (ConstMIBundleOperands OpndIt(*this); OpndIt.isValid() && CurRC; in getRegClassConstraintEffectForVReg() 922 CurRC = OpndIt->getParent()->getRegClassConstraintEffectForVRegImpl( in getRegClassConstraintEffectForVReg() 923 OpndIt.getOperandNo(), Reg, CurRC, TII, TRI); in getRegClassConstraintEffectForVReg() 926 for (unsigned i = 0, e = NumOperands; i < e && CurRC; ++i) in getRegClassConstraintEffectForVReg() 927 CurRC = getRegClassConstraintEffectForVRegImpl(i, Reg, CurRC, TII, TRI); in getRegClassConstraintEffectForVReg() 928 return CurRC; in getRegClassConstraintEffectForVReg() 932 unsigned OpIdx, Register Reg, const TargetRegisterClass *CurRC, in getRegClassConstraintEffectForVRegImpl() argument 934 assert(CurRC && "Invalid initial register class"); in getRegClassConstraintEffectForVRegImpl() 938 return CurRC; in getRegClassConstraintEffectForVRegImpl() [all …]
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D | RegAllocGreedy.cpp | 2077 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg()); in tryInstructionSplit() local 2079 if (!RegClassInfo.isProperSubClass(CurRC)) in tryInstructionSplit() 2095 TRI->getLargestLegalSuperClass(CurRC, *MF); in tryInstructionSplit() 2520 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg()); in mayRecolorAllInterferences() local 2538 MRI->getRegClass(Intf->reg()) == CurRC) && in mayRecolorAllInterferences()
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/external/llvm/lib/CodeGen/ |
D | MachineInstr.cpp | 1215 unsigned Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, in getRegClassConstraintEffectForVReg() argument 1220 for (ConstMIBundleOperands OpndIt(*this); OpndIt.isValid() && CurRC; in getRegClassConstraintEffectForVReg() 1222 CurRC = OpndIt->getParent()->getRegClassConstraintEffectForVRegImpl( in getRegClassConstraintEffectForVReg() 1223 OpndIt.getOperandNo(), Reg, CurRC, TII, TRI); in getRegClassConstraintEffectForVReg() 1226 for (unsigned i = 0, e = NumOperands; i < e && CurRC; ++i) in getRegClassConstraintEffectForVReg() 1227 CurRC = getRegClassConstraintEffectForVRegImpl(i, Reg, CurRC, TII, TRI); in getRegClassConstraintEffectForVReg() 1228 return CurRC; in getRegClassConstraintEffectForVReg() 1232 unsigned OpIdx, unsigned Reg, const TargetRegisterClass *CurRC, in getRegClassConstraintEffectForVRegImpl() argument 1234 assert(CurRC && "Invalid initial register class"); in getRegClassConstraintEffectForVRegImpl() 1238 return CurRC; in getRegClassConstraintEffectForVRegImpl() [all …]
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D | RegAllocGreedy.cpp | 1583 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg); in tryInstructionSplit() local 1585 if (!RegClassInfo.isProperSubClass(CurRC)) in tryInstructionSplit() 1600 TRI->getLargestLegalSuperClass(CurRC, *MF); in tryInstructionSplit() 2012 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg); in mayRecolorAllInterferences() local 2029 MRI->getRegClass(Intf->reg) == CurRC) || in mayRecolorAllInterferences()
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/external/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/ |
D | MachineInstr.cpp | 871 Register Reg, const TargetRegisterClass *CurRC, const TargetInstrInfo *TII, in getRegClassConstraintEffectForVReg() argument 876 for (ConstMIBundleOperands OpndIt(*this); OpndIt.isValid() && CurRC; in getRegClassConstraintEffectForVReg() 878 CurRC = OpndIt->getParent()->getRegClassConstraintEffectForVRegImpl( in getRegClassConstraintEffectForVReg() 879 OpndIt.getOperandNo(), Reg, CurRC, TII, TRI); in getRegClassConstraintEffectForVReg() 882 for (unsigned i = 0, e = NumOperands; i < e && CurRC; ++i) in getRegClassConstraintEffectForVReg() 883 CurRC = getRegClassConstraintEffectForVRegImpl(i, Reg, CurRC, TII, TRI); in getRegClassConstraintEffectForVReg() 884 return CurRC; in getRegClassConstraintEffectForVReg() 888 unsigned OpIdx, Register Reg, const TargetRegisterClass *CurRC, in getRegClassConstraintEffectForVRegImpl() argument 890 assert(CurRC && "Invalid initial register class"); in getRegClassConstraintEffectForVRegImpl() 894 return CurRC; in getRegClassConstraintEffectForVRegImpl() [all …]
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D | RegAllocGreedy.cpp | 2088 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg); in tryInstructionSplit() local 2090 if (!RegClassInfo.isProperSubClass(CurRC)) in tryInstructionSplit() 2106 TRI->getLargestLegalSuperClass(CurRC, *MF); in tryInstructionSplit() 2532 const TargetRegisterClass *CurRC = MRI->getRegClass(VirtReg.reg); in mayRecolorAllInterferences() local 2551 MRI->getRegClass(Intf->reg) == CurRC) && in mayRecolorAllInterferences()
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/external/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 1010 unsigned Reg, const TargetRegisterClass *CurRC, 1024 getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, 1274 unsigned OpIdx, unsigned Reg, const TargetRegisterClass *CurRC,
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/external/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 1331 Register Reg, const TargetRegisterClass *CurRC, 1345 getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, 1691 unsigned OpIdx, Register Reg, const TargetRegisterClass *CurRC,
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/external/llvm-project/llvm/include/llvm/CodeGen/ |
D | MachineInstr.h | 1443 Register Reg, const TargetRegisterClass *CurRC, 1457 getRegClassConstraintEffect(unsigned OpIdx, const TargetRegisterClass *CurRC, 1819 unsigned OpIdx, Register Reg, const TargetRegisterClass *CurRC,
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